Inventor profile of:

Eduardo MAAYAN

City:

Kfar Saba

Country:

Israel

Published Applications:

37

Last publication date:

2025-10-09

Top Assignees for applications by Eduardo MAAYAN

The entities that hold a legal rights for patent applications filed by inventor MAAYAN Eduardo:

Recent patent applications by MAAYAN Eduardo

Eduardo MAAYAN from Kfar Saba, IL has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-10-09
US20250315170A1
Physics

System and Method for Generation of Unique Digital Signature Using a Non-Volatile Memory based Physical Unclonable Function

#2 | 2019-01-31
US20190035477A1
Physics

Methods, circuits, devices, and systems for sensing an NVM cell

#3 | 2015-11-26
US20150340098A1
Physics

Methods, circuits, devices and systems for sensing an NVM cell

#4 | 2013-08-29
US20130223144A1
Physics

NROM device with reduced power unit

#5 | 2009-12-31
US20090323423A1
Physics

Methods, circuits and systems for reading non-volatile memory cells

#6 | 2009-09-17
US20090231915A1
Physics

Reading array cell with matched reference cell

#7 | 2009-05-21
US20090129166A1
Physics

METHOD, CIRCUIT AND SYSTEM FOR SENSING A CELL IN A NON-VOLATILE MEMORY ARRAY

#8 | 2009-04-14
US10155215
-

EEPROM array and method for operation thereof

#9 | 2009-02-05
US20090032862A1
Electricity

Non-volatile memory cell and non-volatile memory device using said cell

#10 | 2008-08-21
US20080198670A1
Physics

Reduced power programming of non-volatile cells

#11 | 2008-06-05
US20080130359A1
Physics

Multiple use memory chip

#12 | 2008-05-29
US20080123413A1
Physics

Multiple use memory chip

#13 | 2008-05-15
US20080111177A1
Electricity

Non-volatile memory cell and non-volatile memory device using said cell

#14 | 2008-01-03
US20080002464A1
Physics

Non-volatile memory device and method for reading cells

#15 | 2007-11-01
US20070253248A1
Physics

Method for programming a reference cell

#16 | 2007-09-06
US20070206415A1
Electricity

Non-volatile memory cell and non-volatile memory device using said cell

#17 | 2007-08-02
US20070177428A1
Physics

Memory circuit arrangement and method for reading and/or verifying the status of memory cells of a memory cell array

#18 | 2007-07-26
US20070171717A1
Physics

Dynamic matching of signal path and reference path for sensing

#19 | 2007-06-14
US20070133276A1
Physics

Operating array cells with matched reference cells

#20 | 2006-12-21
US20060285408A1
Physics

Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cells

#21 | 2006-12-21
US20060285402A1
Physics

Apparatus and methods for multi-level sensing in a memory array

#22 | 2006-12-21
US20060285386A1
Physics

Device to program adjacent storage cells of different NROM cells

#23 | 2006-12-12
US10322491
-

Charge pump element with body effect cancellation for early charge pump stages

#24 | 2006-11-30
US20060268621A1
Physics

Method for programming a reference cell

#25 | 2006-07-13
US20060152975A1
Physics

Multiple use memory chip

#26 | 2006-06-20
US10454820
-

Method for programming a reference cell

#27 | 2006-06-15
US20060126382A1
Physics

Method for reading non-volatile memory cells

#28 | 2006-02-16
US20060034122A1
Physics

Dynamic matching of signal path and reference path for sensing

#29 | 2005-12-15
US20050276118A1
Physics

Reduced power programming of non-volatile cells

#30 | 2005-12-13
US10211249
-

Mass storage array and methods for operation thereof

#31 | 2005-12-08
US20050269619A1
Electricity

MOS capacitor with reduced parasitic capacitance

#32 | 2005-10-20
US20050232024A1
Physics

Method for reading a memory array with neighbor effect cancellation

#33 | 2005-08-09
US10211234
-

Look ahead methods and apparatus

#34 | 2005-07-12
US10191451
-

Multiple use memory chip

#35 | 2005-06-02
US20050117444A1
Physics

Multiple use memory chip

#36 | 2005-06-02
US20050117395A1
Physics

Method for operating a memory device

#37 | 2005-04-26
US10023469
-

NROM NOR array

InventorID:

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