Inventor profile of:

Ajay Kumar

City:

Sunnyvale, California

Country:

United States

Published Applications:

24

Last publication date:

2008-01-22

Top Assignees for applications by Ajay Kumar

The entities that hold a legal rights for patent applications filed by inventor Kumar Ajay:

Recent patent applications by Kumar Ajay

Ajay Kumar from Sunnyvale, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2008-01-22
US10285967
-

Method for removal of metallic residue after plasma etching of a metal layer

#2 | 2007-11-08
US20070256784A1
Electricity

Plasma reactor with apparatus for dynamically adjusting the plasma source power applicator and the workpiece relative to one another

#3 | 2007-05-15
US10301239
-

Method of plasma etching high-K dielectric materials with high selectivity to underlying layers

#4 | 2007-04-05
US20070077767A1
Electricity

Method of plasma etching of high-K dielectric materials

#5 | 2007-02-01
US20070026547A1
Electricity

Cluster tool and method for process integration in manufacture of a gate structure of a field effect transistor

#6 | 2006-09-12
US10338059
-

Method of etching a magnetic material

#7 | 2006-08-22
US10143397
-

Method of plasma etching of high-K dielectric materials

#8 | 2006-03-23
US20060060565A9
Electricity

Method of etching metals with high selectivity to hafnium-based dielectric materials

#9 | 2006-02-02
US20060021702A1
Electricity

Cluster tool and method for process integration in manufacture of a gate structure of a field effect transistor

#10 | 2006-01-10
US10218473
-

Method for removal of residue from a magneto-resistive random access memory (MRAM) film stack using a sacrificial mask layer

#11 | 2005-12-27
US10118763
-

Etching multi-shaped openings in silicon

#12 | 2005-11-15
US10231675
-

Method for removing residue from a magneto-resistive random access memory (MRAM) film stack using a dual mask

#13 | 2005-10-11
US9907183
-

Methods for forming thermo-optic switches, routers and attenuators

#14 | 2005-09-13
US10382964
-

Method of etching magnetic and ferroelectric materials using a pulsed bias source

#15 | 2005-09-13
US10365008
-

Method of etching ferroelectric layers

#16 | 2005-08-23
US10342087
-

Method for removing conductive residue

#17 | 2005-08-11
US20050176191A1
Electricity

Method for fabricating a notched gate structure of a field effect transistor

#18 | 2005-06-28
US10394464
-

Method of etching a magnetic material

#19 | 2005-06-14
US10382562
-

Method of releasing devices from a substrate

#20 | 2005-06-07
US10184301
-

Method for plasma etching of high-K dielectric materials

#21 | 2005-05-24
US10219885
-

Method for etching high-aspect-ratio features

#22 | 2005-05-17
US10235100
-

Method of preventing short circuits in magnetic film stacks

#23 | 2005-02-15
US10194609
-

Method for fabricating a gate structure

#24 | 2005-01-11
US10418449
-

Method of fabricating a magneto-resistive random access memory (MRAM) device

InventorID:

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