Inventor profile of:

James PAK

City:

Sunnyvale, California

Country:

United States

Published Applications:

23

Last publication date:

2026-04-09

Top Assignees for applications by James PAK

The entities that hold a legal rights for patent applications filed by inventor PAK James:

Recent patent applications by PAK James

James PAK from Sunnyvale, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-09
US20260101514A1
Electricity

NON-VOLATILE MEMORY DEVICE HAVING VERTICAL CHANNELS AND METHODS OF FABRICATION THEREOF

#2 | 2026-04-09
US20260101507A1
Electricity

METHOD OF INTEGRATION OF NON-VOLATILE MEMORY DEVICE HAVING VERTICAL CHANNELS FORMATION INTO CMOS FLOW

#3 | 2025-10-09
US20250315170A1
Physics

System and Method for Generation of Unique Digital Signature Using a Non-Volatile Memory based Physical Unclonable Function

#4 | 2024-06-20
US20240206183A1
Electricity

HIGH-VOLTAGE TRANSISTOR WITH THIN HIGH-K METAL GATE AND METHOD OF FABRICATION THEREOF

#5 | 2024-01-04
US20240008279A1
Electricity

Method of forming high-voltage transistor with thin gate poly

#6 | 2021-09-23
US20210296343A1
Electricity

Method of forming high-voltage transistor with thin gate poly

#7 | 2021-05-06
US20210134811A1
Electricity

EMBEDDED NON-VOLATILE MEMORY DEVICE AND FABRICATION METHOD OF THE SAME

#8 | 2021-03-25
US20210091198A1
Electricity

Memory first process flow and device

#9 | 2019-12-19
US20190386109A1
Electricity

Memory first process flow and device

#10 | 2019-10-03
US20190304990A1
Electricity

Method of Forming High-Voltage Transistor with Thin Gate Poly

#11 | 2019-06-27
US20190198125A1
Physics

Non-volatile memory device and method of blank check

#12 | 2019-03-07
US20190074286A1
Electricity

Method of reducing charge loss in non-volatile memories

#13 | 2019-01-24
US20190027487A1
Electricity

Method of forming high-voltage transistor with thin gate poly

#14 | 2019-01-24
US20190027484A1
Electricity

Embedded non-volatile memory device and fabrication method of the same

#15 | 2018-12-20
US20180366551A1
Electricity

Memory first process flow and device

#16 | 2018-09-04
US15614271
Electricity

Method of reducing charge loss in non-volatile memories

#17 | 2018-06-14
US20180166458A1
Electricity

Split-gate flash cell formed on recessed substrate

#18 | 2017-12-26
US15473372
Electricity

Split-gate flash cell formed on recessed substrate

#19 | 2017-05-18
US20170141201A1
Electricity

Memory first process flow and device

#20 | 2016-10-06
US20160293720A1
Electricity

Memory first process flow and device

#21 | 2014-06-19
US20140167140A1
Electricity

Memory first process flow and device

#22 | 2014-06-19
US20140167136A1
Electricity

Charge Trapping Device with Improved Select Gate to Memory Gate Isoloation

#23 | 2013-10-03
US20130258775A1
Physics

Adaptively programming or erasing flash memory blocks

InventorID:

465568 ⎘