Inventor profile of:

JONG-MIN BAEK

City:

SUWON-SI

Country:

South Korea

Published Applications:

21

Last publication date:

2025-04-10

Top Assignees for applications by JONG-MIN BAEK

The entities that hold a legal rights for patent applications filed by inventor BAEK JONG-MIN:

Recent patent applications by BAEK JONG-MIN

JONG-MIN BAEK from SUWON-SI, KR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-04-10
US20250118671A1
Electricity

SEMICONDUCTOR DEVICE

#2 | 2025-04-10
US20250118670A1
Electricity

SEMICONDUCTOR DEVICE

#3 | 2025-02-20
US20250063814A1
Electricity

SEMICONDUCTOR DEVICE

#4 | 2025-01-02
US20250006641A1
Electricity

SEMICONDUCTOR DEVICE

#5 | 2024-10-24
US20240355637A1
Electricity

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

#6 | 2024-07-04
US20240222453A1
Electricity

SEMICONDUCTOR DEVICE

#7 | 2024-04-18
US20240128332A1
Electricity

SEMICONDUCTOR DEVICES

#8 | 2024-04-11
US20240120274A1
Electricity

SEMICONDUCTOR DEVICE

#9 | 2023-12-21
US20230411498A1
Electricity

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

#10 | 2023-12-07
US20230395667A1
Electricity

SEMICONDUCTOR DEVICE

#11 | 2023-10-12
US20230326964A1
Electricity

SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME

#12 | 2023-09-28
US20230307370A1
Electricity

SEMICONDUCTOR DEVICE

#13 | 2016-05-12
US20160133577A1
Electricity

Wiring Structures and Methods of Forming the Same

#14 | 2015-07-09
US20150194333A1
Electricity

Methods of forming wiring structures and methods of fabricating semiconductor devices

#15 | 2015-06-25
US20150179582A1
Electricity

Methods of forming wiring structures

#16 | 2013-10-10
US20130267088A1
Electricity

Method of fabricating semiconductor device

#17 | 2012-04-19
US20120094437A1
Electricity

Method of forming through silicon via of semiconductor device using low-k dielectric material

#18 | 2012-04-05
US20120083117A1
Electricity

Method of forming hardened porous dielectric layer and method of fabricating semiconductor device having hardened porous dielectric layer

#19 | 2010-08-19
US20100210105A1
Electricity

Method of fabricating semiconductor device having buried wiring

#20 | 2010-05-13
US20100120211A1
Electricity

Methods of manufacturing Semiconductor Devices Including PMOS and NMOS Transistors Having Different Gate Structures

#21 | 2009-07-30
US20090189229A1
Electricity

Semiconductor devices and methods of fabricating the same

InventorID:

477641 ⎘