Inventor profile of:

Albert Birner

City:

Regensburg

Country:

Germany

Published Applications:

50

Last publication date:

2025-07-24

Top Assignees for applications by Albert Birner

The entities that hold a legal rights for patent applications filed by inventor Birner Albert:

Recent patent applications by Birner Albert

Albert Birner from Regensburg, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-07-24
US20250240993A1
Electricity

SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR BODY HAVING A TYPE III-NITRIDE SEMICONDUCTOR PORTION DISPOSED ON A BASE CARRIER PORTION

#2 | 2025-05-15
US20250159917A1
Electricity

Semiconductor Device and Method for Fabricating a Semiconductor Wafer

#3 | 2024-12-12
US20240413212A1
Electricity

GROUP III NITRIDE DEVICE

#4 | 2024-08-01
US20240258382A1
Electricity

GROUP III NITRIDE-BASED TRANSISTOR DEVICE HAVING A CONDUCTIVE REDISTRIBUTION STRUCTURE

#5 | 2024-01-25
US20240030334A1
Electricity

GROUP III NITRIDE-BASED SEMICONDUCTOR DEVICE

#6 | 2023-05-18
US20230155000A1
Electricity

Selective laser annealing method

#7 | 2022-08-11
US20220254913A1
Electricity

Semiconductor device and method of fabricating a semiconductor device

#8 | 2022-06-30
US20220208972A1
Electricity

Group III nitride device having an ohmic contact

#9 | 2021-12-09
US20210384318A1
Electricity

Selective thermal annealing method

#10 | 2021-10-28
US20210336043A1
Electricity

Group III nitride device and method of fabricating a Group III nitride-based device

#11 | 2021-10-28
US20210336015A1
Electricity

Group III nitride-based transistor device having a field plate

#12 | 2021-07-22
US20210226039A1
Electricity

Semiconductor device and method for fabricating a semiconductor wafer

#13 | 2020-12-17
US20200395447A1
Electricity

Semiconductor Device and Method for Fabricating a Wafer

#14 | 2020-06-04
US20200176594A1
Electricity

Semiconductor device and method of fabricating a semiconductor device

#15 | 2020-05-28
US20200168709A1
Electricity

Group III nitride device and method of fabricating an ohmic contact for a group III nitride-based device

#16 | 2019-11-28
US20190363038A1
Electricity

LDMOS transistor and method

#17 | 2019-06-06
US20190172771A1
Electricity

LDMOS transistor

#18 | 2018-12-27
US20180374921A1
Electricity

Semiconductor wafer

#19 | 2018-12-06
US20180350981A1
Electricity

Method of manufacturing a semiconductor device including an LDMOS transistor

#20 | 2018-09-27
US20180277501A1
Electricity

LDMOS transistor structure and method of manufacture

#21 | 2018-09-20
US20180269279A1
Electricity

Semiconductor device including an LDMOS transistor and a resurf structure

#22 | 2018-09-13
US20180261534A1
Electricity

Through vias and methods of formation thereof

#23 | 2018-06-07
US20180158941A1
Electricity

Semiconductor device

#24 | 2018-05-17
US20180138086A1
Electricity

Substrate and method

#25 | 2018-03-29
US20180090455A1
Electricity

Semiconductor device including a LDMOS transistor, monolithic microwave integrated circuit and method

#26 | 2018-03-27
US15370536
Electricity

Method for manufacturing a semiconductor device

#27 | 2018-03-22
US20180083107A1
Electricity

Method of fabricating a semiconductor wafer that includes producing a planarised surface having both a mesa surface and an insulating layer surface

#28 | 2018-03-22
US20180082853A1
Electricity

Method of planarising a surface

#29 | 2017-12-28
US20170373187A1
Electricity

Semiconductor device including a LDMOS transistor and method

#30 | 2017-12-28
US20170373138A1
Electricity

Semiconductor device including an LDMOS transistor and a RESURF structure

#31 | 2017-12-28
US20170373137A1
Electricity

Semiconductor device including a LDMOS transistor

#32 | 2017-12-28
US20170372986A1
Electricity

LDMOS transistor and method

#33 | 2017-12-28
US20170372985A1
Electricity

LDMOS transistor and method

#34 | 2017-12-28
US20170372952A1
Electricity

Substrate and method including forming a via comprising a conductive liner layer and conductive plug having different microstructures

#35 | 2017-03-09
US20170069554A1
Electricity

Monitor structures and methods of formation thereof

#36 | 2016-09-08
US20160260699A1
Electricity

Method of manufacturing semiconductor devices by bonding a semiconductor disk on a base substrate, composite wafer and semiconductor device

#37 | 2015-12-17
US20150364402A1
Electricity

Monitor structures and methods of formation thereof

#38 | 2015-09-10
US20150255597A1
Electricity

Semiconductor device and method of making the same

#39 | 2015-08-27
US20150243649A1
Electricity

Power Transistor Die with Capacitively Coupled Bond Pad

#40 | 2015-02-05
US20150035171A1
Electricity

Segmented bond pads and methods of fabrication thereof

#41 | 2014-08-28
US20140239411A1
Electricity

Through vias and methods of formation thereof

#42 | 2014-02-13
US20140042537A1
Electricity

Semiconductor device and method of making the same

#43 | 2013-12-26
US20130341620A1
Electricity

Monitor structures and methods of formation thereof

#44 | 2013-10-10
US20130267093A1
Electricity

Through substrate via semiconductor components and methods of formation thereof

#45 | 2011-12-01
US20110294273A1
Electricity

Method and layout of semiconductor device with reduced parasitics

#46 | 2010-11-04
US20100279503A1
Electricity

Method for producing a copper connection between two sides of a substrate

#47 | 2010-09-16
US20100230818A1
Electricity

Through substrate via semiconductor components

#48 | 2009-12-10
US20090302480A1
Electricity

Through substrate via semiconductor components

#49 | 2009-01-29
US20090026539A1
Electricity

Method and layout of semiconductor device with reduced parasitics

#50 | 2007-02-15
US20070037340A1
Electricity

Fabrication method for fabricating a semiconductor structure and semiconductor structure

InventorID:

477650 ⎘