Regensburg
Germany
50
2025-07-24
The entities that hold a legal rights for patent applications filed by inventor Birner Albert:
Albert Birner from Regensburg, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR BODY HAVING A TYPE III-NITRIDE SEMICONDUCTOR PORTION DISPOSED ON A BASE CARRIER PORTION
#2 | 2025-05-15Semiconductor Device and Method for Fabricating a Semiconductor Wafer
#3 | 2024-12-12GROUP III NITRIDE DEVICE
#4 | 2024-08-01GROUP III NITRIDE-BASED TRANSISTOR DEVICE HAVING A CONDUCTIVE REDISTRIBUTION STRUCTURE
#5 | 2024-01-25GROUP III NITRIDE-BASED SEMICONDUCTOR DEVICE
#6 | 2023-05-18Selective laser annealing method
#7 | 2022-08-11Semiconductor device and method of fabricating a semiconductor device
#8 | 2022-06-30Group III nitride device having an ohmic contact
#9 | 2021-12-09Selective thermal annealing method
#10 | 2021-10-28Group III nitride device and method of fabricating a Group III nitride-based device
#11 | 2021-10-28Group III nitride-based transistor device having a field plate
#12 | 2021-07-22Semiconductor device and method for fabricating a semiconductor wafer
#13 | 2020-12-17Semiconductor Device and Method for Fabricating a Wafer
#14 | 2020-06-04Semiconductor device and method of fabricating a semiconductor device
#15 | 2020-05-28Group III nitride device and method of fabricating an ohmic contact for a group III nitride-based device
#16 | 2019-11-28LDMOS transistor and method
#17 | 2019-06-06LDMOS transistor
#18 | 2018-12-27Semiconductor wafer
#19 | 2018-12-06Method of manufacturing a semiconductor device including an LDMOS transistor
#20 | 2018-09-27LDMOS transistor structure and method of manufacture
#21 | 2018-09-20Semiconductor device including an LDMOS transistor and a resurf structure
#22 | 2018-09-13Through vias and methods of formation thereof
#23 | 2018-06-07Semiconductor device
#24 | 2018-05-17Substrate and method
#25 | 2018-03-29Semiconductor device including a LDMOS transistor, monolithic microwave integrated circuit and method
#26 | 2018-03-27Method for manufacturing a semiconductor device
#27 | 2018-03-22Method of fabricating a semiconductor wafer that includes producing a planarised surface having both a mesa surface and an insulating layer surface
#28 | 2018-03-22Method of planarising a surface
#29 | 2017-12-28Semiconductor device including a LDMOS transistor and method
#30 | 2017-12-28Semiconductor device including an LDMOS transistor and a RESURF structure
#31 | 2017-12-28Semiconductor device including a LDMOS transistor
#32 | 2017-12-28LDMOS transistor and method
#33 | 2017-12-28LDMOS transistor and method
#34 | 2017-12-28Substrate and method including forming a via comprising a conductive liner layer and conductive plug having different microstructures
#35 | 2017-03-09Monitor structures and methods of formation thereof
#36 | 2016-09-08Method of manufacturing semiconductor devices by bonding a semiconductor disk on a base substrate, composite wafer and semiconductor device
#37 | 2015-12-17Monitor structures and methods of formation thereof
#38 | 2015-09-10Semiconductor device and method of making the same
#39 | 2015-08-27Power Transistor Die with Capacitively Coupled Bond Pad
#40 | 2015-02-05Segmented bond pads and methods of fabrication thereof
#41 | 2014-08-28Through vias and methods of formation thereof
#42 | 2014-02-13Semiconductor device and method of making the same
#43 | 2013-12-26Monitor structures and methods of formation thereof
#44 | 2013-10-10Through substrate via semiconductor components and methods of formation thereof
#45 | 2011-12-01Method and layout of semiconductor device with reduced parasitics
#46 | 2010-11-04Method for producing a copper connection between two sides of a substrate
#47 | 2010-09-16Through substrate via semiconductor components
#48 | 2009-12-10Through substrate via semiconductor components
#49 | 2009-01-29Method and layout of semiconductor device with reduced parasitics
#50 | 2007-02-15Fabrication method for fabricating a semiconductor structure and semiconductor structure
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