Inventor profile of:

David E. Brown

City:

Pleasant Valley, New York

Country:

United States

Published Applications:

14

Last publication date:

2013-10-17

Top Assignees for applications by David E. Brown

The entities that hold a legal rights for patent applications filed by inventor Brown David E.:

Recent patent applications by Brown David E.

David E. Brown from Pleasant Valley, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2013-10-17
US20130270680A1
Electricity

METHOD FOR FORMING SEMICONDUCTOR DEVICES WITH ACTIVE SILICON HEIGHT VARIATION

#2 | 2012-12-27
US20120326279A1
Electricity

Semiconductor devices with active semiconductor height variation

#3 | 2011-11-10
US20110272791A1
Electricity

Method for forming semiconductor devices with active silicon height variation

#4 | 2010-06-17
US20100151660A1
Electricity

Method for forming semiconductor devices with active silicon height variation

#5 | 2010-02-23
US11053935
-

Method for forming semiconductor devices with active silicon height variation

#6 | 2009-11-12
US20090280579A1
Electricity

Method of controlling embedded material/gate proximity

#7 | 2009-09-24
US20090236664A1
Electricity

INTEGRATION SCHEME FOR CONSTRAINED SEG GROWTH ON POLY DURING RAISED S/D PROCESSING

#8 | 2009-06-30
US11150923
-

Integration scheme for constrained SEG growth on poly during raised S/D processing

#9 | 2008-12-09
US11205797
-

Methods for fabricating a stressed MOS device

#10 | 2006-12-14
US20060281271A1
Electricity

Method of forming a semiconductor device having an epitaxial layer and device thereof

#11 | 2006-09-21
US20060208250A1
Electricity

Semiconductor device based on Si-Ge with high stress liner for enhanced channel carrier mobility

#12 | 2005-11-10
US20050247926A1
Electricity

Semiconductor device based on Si-Ge with high stress liner for enhanced channel carrier mobility

#13 | 2005-10-18
US11053863
-

Method for detecting silicide encroachment of a gate electrode in a semiconductor arrangement

#14 | 2005-03-03
US20050048731A1
Electricity

Siliciding spacer in integrated circuit technology

InventorID:

483051 ⎘