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Inventor profile of:

Nicolas Kacevas

City:

Folsom, California

Country:

United States

Published Applications:

8

Last publication date:

2025-10-02

Top Assignees for applications by Nicolas Kacevas

The entities that hold a legal rights for patent applications filed by inventor Kacevas Nicolas:

  • INTEL CORPORATION 7 Santa Clara, CA United States

Recent patent applications by Kacevas Nicolas

Nicolas Kacevas from Folsom, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-10-02
US20250308135A1
Physics

APPARATUS AND METHOD FOR THROTTLING RAY TRACING OPERATIONS BASED ON CACHE HIT RATE

#2 | 2020-01-02
US20200004683A1
Physics

Cache partitioning mechanism

#3 | 2019-07-25
US20190228499A1
Physics

Apparatus and method for shared resource partitioning through credit management

#4 | 2019-07-11
US20190213707A1
Physics

Scalable memory interface for graphical processor unit

#5 | 2019-07-11
US20190213140A1
Physics

Mechanism to support variable size page translations

#6 | 2019-05-30
US20190163641A1
Physics

PAGE TRANSLATION PREFETCH MECHANISM

#7 | 2018-02-15
US20180047131A1
Physics

Apparatus and method for shared resource partitioning through credit management

#8 | 2013-10-17
US20130275683A1
Physics

Programmably Partitioning Caches

InventorID:

490473 ⎘

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