Aloha, Oregon
United States
53
2026-06-04
The entities that hold a legal rights for patent applications filed by inventor HASAN Mohammad:
Mohammad HASAN from Aloha, US has applied for patents for these inventions. The list has both pending applications and granted patents:
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DOPED SUBFIN
#2 | 2026-04-30GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NECKED FEATURE
#3 | 2026-04-30INTEGRATED CIRCUITS WITH GATE PLUGS TO INDUCE COMPRESSIVE CHANNEL STRAIN
#4 | 2026-02-19GATE ALIGNED FIN CUT FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION
#5 | 2026-01-22GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAIN STRUCTURES WITH REGROWN CENTRAL PORTIONS
#6 | 2025-10-23INTEGRATED CIRCUIT STRUCTURES HAVING CUT METAL GATES
#7 | 2025-07-10INTEGRATED CIRCUIT STRUCTURES WITH BACKSIDE GATE PARTIAL CUT OR TRENCH CONTACT PARTIAL CUT
#8 | 2025-07-10INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC GATE WALL AND DIELECTRIC GATE PLUG
#9 | 2025-06-19INTEGRATED CIRCUIT STRUCTURE WITH VARIED SUB-FIN TRENCHES AND EPITAXIAL SOURCE OR DRAIN STRUCTURES
#10 | 2025-04-24INTEGRATED CIRCUIT STRUCTURES HAVING CUT METAL GATES
#11 | 2025-01-02INTEGRATED CIRCUIT STRUCTURES WITH INTERNAL SPACER LINERS
#12 | 2025-01-02INTEGRATED CIRCUIT STRUCTURES WITH REMOVED SUB-FIN
#13 | 2024-10-17INTEGRATED CIRCUIT STRUCTURES HAVING CUT METAL GATES
#14 | 2024-05-30FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING PRE-SPACER DEPOSITION CUT GATES
#15 | 2024-05-09INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED EPITAXIAL SOURCE OR DRAIN STRUCTURE
#16 | 2024-04-04EPITAXIAL STRUCTURE AND GATE METAL STRUCTURES WITH A PLANAR TOP SURFACE
#17 | 2024-03-28INTEGRATED CIRCUIT STRUCTURES WITH UNIFORM EPITAXIAL SOURCE OR DRAIN CUT
#18 | 2024-01-11High aspect ratio source or drain structures with abrupt dopant profile
#19 | 2023-10-05SOURCE OR DRAIN STRUCTURES WITH SELECTIVE SILICIDE CONTACTS THEREON
#20 | 2023-10-05GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NECKED FEATURE
#21 | 2023-09-07DEEP ETCH PROCESSING FOR TRANSISTORS HAVING VARYING PITCH
#22 | 2023-09-07GATE CUT STRUCTURES
#23 | 2023-08-31CONDUCTIVE CONTACTS WRAPPED AROUND EPITAXIAL SOURCE OR DRAIN REGIONS
#24 | 2023-06-29SRAM WITH CHANNEL COUNT CONTRAST FOR GREATER READ STABILITY
#25 | 2023-06-29INTEGRATED CIRCUITS WITH GATE PLUGS TO INDUCE COMPRESSIVE CHANNEL STRAIN
#26 | 2023-06-29GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAIN STRUCTURES WITH SUBSTRATE CONNECTION PORTIONS
#27 | 2023-06-29EPI BARRIER ALIGNED BACKSIDE CONTACT
#28 | 2023-06-22GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAIN STRUCTURES WITH REGROWN CENTRAL PORTIONS
#29 | 2023-06-22INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED EPITAXIAL SOURCE OR DRAIN STRUCTURE
#30 | 2023-06-22GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAIN-LAST STRUCTURES
#31 | 2023-06-22FORMATION OF CAVITY SPACER AND SOURCE-DRAIN EPITAXIAL GROWTH FOR SCALING OF GATE-ALL-AROUND TRANSISTORS
#32 | 2023-06-22INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATE PLUG LANDED ON DIELECTRIC ANCHOR
#33 | 2023-06-22GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING EPITAXIAL SOURCE OR DRAIN REGION LATERAL ISOLATION
#34 | 2023-06-22GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING RAISED WALL STRUCTURES FOR EPITAXIAL SOURCE OR DRAIN REGION CONFINEMENT
#35 | 2023-06-08GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING DIRECTED BOTTOM-UP APPROACH
#36 | 2023-03-30TRANSISTORS WITH REDUCED EPITAXIAL SOURCE/DRAIN SPAN VIA ETCH-BACK FOR IMPROVED CELL SCALING
#37 | 2023-03-23INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC GATE WALL AND DIELECTRIC GATE PLUG
#38 | 2023-03-23GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DOPED SUBFIN
#39 | 2023-03-16SELECTIVE DEPOPULATION OF GATE-ALL-AROUND SEMICONDUCTOR DEVICES
#40 | 2023-03-16SELECTIVELY THINNED GATE-ALL-AROUND (GAA) STRUCTURES
#41 | 2022-12-29NANORIBBON SUBFIN ISOLATION BY BACKSIDE SILICON SUBSTRATE REMOVAL WITH EPI PROTECTION
#42 | 2022-12-29INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATES WITH TAPERED PLUGS
#43 | 2022-12-29METAL LINE PROFILE SHAPING FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION
#44 | 2022-12-22INTEGRATED CIRCUIT STRUCTURES HAVING PLUGGED METAL GATES
#45 | 2022-12-15CONDUCTIVE VIA BAR SELF-ALIGNED TO GATE END
#46 | 2022-12-15INTEGRATED CIRCUIT STRUCTURES WITH BACKSIDE GATE PARTIAL CUT OR TRENCH CONTACT PARTIAL CUT
#47 | 2022-12-15INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATES WITH REDUCED ASPECT RATIO CUTS
#48 | 2022-12-08INTEGRATED CIRCUIT STRUCTURES HAVING CUT METAL GATES
#49 | 2022-12-08GATE ALIGNED FIN CUT FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION
#50 | 2022-12-08SPACER SELF-ALIGNED VIA STRUCTURES FOR GATE CONTACT OR TRENCH CONTACT
#51 | 2022-06-23Localized spacer for nanowire transistors and methods of fabrication
#52 | 2022-03-24Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates
#53 | 2021-03-25High aspect ratio source or drain structures with abrupt dopant profile
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