Inventor profile of:

Mark Leinwander

City:

Folsom, California

Country:

United States

Published Applications:

22

Last publication date:

2020-12-24

Top Assignees for applications by Mark Leinwander

The entities that hold a legal rights for patent applications filed by inventor Leinwander Mark:

Recent patent applications by Leinwander Mark

Mark Leinwander from Folsom, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2020-12-24
US20200401550A1
Physics

Autonomous memory architecture

#2 | 2019-08-20
US15682221
Physics

Using out-of-band signaling to communicate with daisy chained nonvolatile memories

#3 | 2019-02-07
US20190042361A1
Physics

XOR parity management on a physically addressable solid state drive

#4 | 2018-11-08
US20180322085A1
Physics

Memory device for a hierarchical memory architecture

#5 | 2018-01-25
US20180024966A1
Physics

Autonomous memory architecture

#6 | 2017-08-22
US14160347
Physics

Using out-of-band signaling to communicate with daisy chained nonvolatile memories

#7 | 2017-08-03
US20170220516A1
Physics

Memory device for a hierarchical memory architecture

#8 | 2015-12-24
US20150370750A1
Physics

Memory device for a hierarchical memory architecture

#9 | 2015-07-23
US20150205530A1
Physics

Autonomous memory subsystem architecture

#10 | 2015-03-19
US20150081998A1
Physics

Block-based storage device with a memory-mapped interface

#11 | 2014-11-25
US12582643
-

Block-based storage device with a memory-mapped interface

#12 | 2014-11-13
US20140337688A1
Physics

Switchable on-die memory error correcting engine

#13 | 2013-11-14
US20130305123A1
Physics

Switchable on-die memory error correcting engine

#14 | 2013-07-23
US12495081
-

Switchable on-die memory error correcting engine

#15 | 2011-07-07
US20110167197A1
Physics

Nonvolatile Storage with Disparate Memory Types

#16 | 2011-03-17
US20110067039A1
Physics

Autonomous memory architecture

#17 | 2011-03-17
US20110066796A1
Physics

Autonomous memory subsystem architecture

#18 | 2010-12-30
US20100332895A1
Physics

Non-volatile memory to store memory remap information

#19 | 2010-12-16
US20100318718A1
Physics

Memory device for a hierarchical memory architecture

#20 | 2010-06-24
US20100161914A1
Physics

AUTONOMOUS MEMORY SUBSYSTEMS IN COMPUTING PLATFORMS

#21 | 2007-03-15
US20070061500A1
Physics

Relocatable overlay window to access supernumerary data resources

#22 | 2006-06-22
US20060136755A1
Physics

System, apparatus, and method to enable and disable a mode of operation of a stacked circuit arrangement on an independent circuit basis using register bits and a single shared mode control line

InventorID:

532659 ⎘