Phoenix, Arizona
United States
71
2026-03-26
The entities that hold a legal rights for patent applications filed by inventor Duong Benjamin:
Benjamin Duong from Phoenix, US has applied for patents for these inventions. The list has both pending applications and granted patents:
3D PRINTING OF GLASS CORE EDGE PROTECTION IN IC DEVICE PACKAGING
#2 | 2026-03-26GLASS ETCH PROTECTION AND SEWARE REDUCTION BY COATING PROTECTION
#3 | 2026-03-26EDGE COATING FOR GLASS CORE SUBSTRATE WITH A FRAME
#4 | 2026-03-26EDGE COATING FOR GLASS CORE SUBSTRATE WITH AIR PRESSING FOR PROFILE CONTROL
#5 | 2026-03-26GLASS CORE SUBSTRATE WITH EDGE BIAS
#6 | 2026-03-19Apparatus and Methods for Water-Assisted Singulation
#7 | 2026-01-08MICRO LED ARRAYS ON GLASS SUBSTRATES FOR OPTICAL COMMUNICATIONS
#8 | 2026-01-01HYBRID PANEL WITH A GLASS SUBSTRATE
#9 | 2026-01-01THIN GLASS CORE PANELS IN CIRCUIT DEVICE PACKAGING
#10 | 2026-01-01FABRICATING INTEGRATED CIRCUIT PACKAGES WITH GLASS CORE HYBRID PANELS
#11 | 2026-01-01HYBRID PANEL WITH A GLASS SUBSTRATE AND PLATED FRAME
#12 | 2025-10-02DETACHABLE OPTICAL CONNECTOR WITH INTEGRATED STRAIN RELIEF FEATURES
#13 | 2025-09-11CORE JOINING FOR EMBEDDED DIE WITHIN PACKAGE SUBSTRATES
#14 | 2025-08-28INTERCONNECTIONS TO PACKAGE SUBSTRATES FOR INTERCONNECT BRIDGES
#15 | 2025-07-03COMPONENT EMBEDDED IN MOLD MATERIAL FOR MITIGATING THICKNESS MISMATCH WITH CORE
#16 | 2025-07-03MICROELECTRONIC STRUCTURES INCLUDING EMBEDDED INTEGRATED CAPACITOR IN MULTILAYER CORE
#17 | 2025-07-03DIE AND CONDUCTIVE VIAS EMBEDDED IN A SUBSTRATE
#18 | 2025-07-03METHODS AND APPARATUS TO FACILITATE SEMICONDUCTOR DEVICE ALIGNMENT IN AN INTEGRATED CIRCUIT PACKAGE
#19 | 2025-07-03SPACER FOR EMBEDDED COMPONENT IN CORE
#20 | 2025-07-03RECONSTITUTED PASSIVE WITH MECHANICAL SUPPORT STRUCTURES
#21 | 2025-07-03OPTICAL BRIDGE FOR PHOTONIC INTERPOSER TO PHOTONIC INTERPOSER COMMUNICATIONS
#22 | 2025-06-26MIXED DEPTH CAVITY FOR EMBEDDED BRIDGE STRUCTURES
#23 | 2025-06-12EMBEDDED BRIDGE WITH THROUGH SILICON VIA BONDING ARCHITECTURES
#24 | 2025-06-05DIRECT BONDING FOR EMBEDDED BRIDGES WITH VIAS
#25 | 2025-06-05PASSIVE STRUCTURES IN EMBEDDED BRIDGE ARCHITECTURES
#26 | 2025-04-03DEEP CAVITY ARRANGEMENTS ON INTEGRATED CIRCUIT PACKAGING
#27 | 2025-04-03DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY
#28 | 2025-01-09HYBRID CORES INCLUDING ADHESIVE PROMOTION LAYERS AND RELATED METHODS
#29 | 2025-01-02CARBON NANOFIBER CAPACITOR APPARATUS AND RELATED METHODS
#30 | 2025-01-02SEMICONDUCTOR LAYER WITH DRY DEPOSITION LAYER
#31 | 2024-10-17METHODS AND APPARATUS TO REDUCE DELAMINATION IN HYBRID CORES
#32 | 2024-10-17OPTICAL FIBER MOUNTS FOR PRINTED CIRCUIT BOARDS AND INTEGRATED CIRCUIT DEVICE PACKAGES
#33 | 2024-10-03GLASS-INTEGRATED INDUCTORS IN INTEGRATED CIRCUIT PACKAGES
#34 | 2024-10-03ELECTRONIC SUBSTRATES HAVING EMBEDDED INDUCTORS
#35 | 2024-10-03MEMS DIES EMBEDDED IN GLASS CORES
#36 | 2024-09-19VIA STRUCTURES IN BONDED GLASS SUBSTRATES
#37 | 2024-09-19VIA STRUCTURES IN BONDED GLASS SUBSTRATES
#38 | 2024-07-04PACKAGE SUBSTRATE EMBEDDED MULTI-LAYERED IN VIA CAPACITORS
#39 | 2024-07-04SUBSTRATE PACKAGE-INTEGRATED OXIDE CAPACITORS AND RELATED METHODS
#40 | 2024-07-04ELECTRO-OPTICAL CIRCUITS WITH MODULAR SWITCHABLE PHOTONIC INTERFACE
#41 | 2024-06-27THIN FILM CAPACITOR (TFC) ARCHITECTURES FOR PACKAGE SUBSTRATES
#42 | 2024-06-27THIN FILM CAPACITORS (TFCS) IN ETCHED BACK DEEP VIA
#43 | 2024-05-30INTEGRATED OPTICAL PHASE CHANGE MATERIALS FOR RECONFIGURABLE OPTICS IN GLASS CORES
#44 | 2024-04-04SINGULATION OF INTEGRATED CIRCUIT PACKAGE SUBSTRATES WITH GLASS CORES
#45 | 2024-04-04INTEGRATED HORIZONTAL VARISTOR ON GLASS CORE FOR VOLTAGE REGULATION
#46 | 2024-04-04INTEGRATED POWER DELIVERY REGULATION CIRCUITS IN GLASS CORE USING EMBEDDED ACTIVE AND PASSIVE COMPONENTS
#47 | 2024-04-04EMBEDDED THIN FILM VARISTOR IN THROUGH GLASS VIAS
#48 | 2024-04-04AIR GAP ARCHITECTURE FOR HIGH SPEED I/O SUBSTRATE TRACES
#49 | 2024-04-04HYBRID PLASMONIC WAVEGUIDE AND METHOD FOR HIGH DENSITY PACKAGING INTEGRATED WITH A GLASS INTERPOSER
#50 | 2024-04-04GLASS RECIRCULATOR FOR OPTICAL SIGNAL REROUTING ACROSS PHOTONIC INTEGRATED CIRCUITS
#51 | 2024-03-28METHODS AND APPARATUS UTILIZING CONJUGATED POLYMERS IN INTEGRATED CIRCUIT PACKAGES WITH GLASS SUBSTRATES
#52 | 2024-03-28OPEN CAVITY INTERCONNECTS FOR MIB CONNECTIONS
#53 | 2024-03-21THIN FILM CAPACITORS
#54 | 2024-03-07IC PACKAGE WITH MICRO LEDS
#55 | 2024-01-04INTEGRATED CIRCUIT PACKAGE WITH MULTI-LAYERED METALLIZATION LINES
#56 | 2024-01-04METHODS AND APPARATUS TO ADHERE A DIELECTRIC TO A NONCONDUCTIVE LAYER IN CIRCUIT DEVICES
#57 | 2023-10-05SURFACE FUNCTIONALIZATION OF SINX THIN FILM BY WET ETCHING FOR IMPROVED ADHESION OF METAL-DIELECTRIC FOR HSIO
#58 | 2023-10-05PLASMA-INDUCED SURFACE FUNCTIONALIZATION OF SINX THIN FILM FOR IMPROVED ADHESION OF METAL-DIELECTRIC FOR HSIO
#59 | 2023-10-05MODIFICATION OF SINX THIN FILM FOR IMPROVED ADHESION OF METAL-DIELECTRICS FOR HSIO PACKAGING
#60 | 2023-04-06POSITION CONTROLLED WAVEGUIDES AND METHODS OF MANUFACTURING THE SAME
#61 | 2023-03-23DIE FIRST FAN-OUT ARCHITECTURE FOR ELECTRIC AND OPTICAL INTEGRATION
#62 | 2023-03-23DIE LAST AND WAVEGUIDE LAST ARCHITECTURE FOR SILICON PHOTONIC PACKAGING
#63 | 2023-03-16DEFECT-FREE THROUGH GLASS VIA METALLIZATION IMPLEMENTING A SACRIFICIAL RESIST THINNING MATERIAL
#64 | 2023-03-16DEFECT-FREE THROUGH GLASS VIA METALLIZATION IMPLEMENTING A REVERSE FILLING ARCHITECTURE
#65 | 2023-03-09GLASS INTERPOSER OPTICAL SWITCHING DEVICE AND METHOD
#66 | 2022-12-22OPTICAL COMMUNICATION BETWEEN INTEGRATED CIRCUIT DEVICE ASSEMBLIES
#67 | 2022-11-24INTEGRATED CIRCUIT PACKAGE INTERPOSERS WITH PHOTONIC & ELECTRICAL ROUTING
#68 | 2022-03-24Electronic substrates having embedded inductors
#69 | 2022-03-24ELECTRONIC SUBSTRATES HAVING EMBEDDED INDUCTORS
#70 | 2022-03-24Electronic substrates having embedded inductors
#71 | 2022-03-17Radio frequency antennas and waveguides for communication between integrated circuit devices
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