San Jose, California
United States
52
2024-11-07
The entities that hold a legal rights for patent applications filed by inventor Mani Krishnakumar:
Krishnakumar Mani from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:
TOOL FOR ANNEALING OF MAGNETIC STACKS
#2 | 2022-10-06Memory cell layout for low current field-induced MRAM
#3 | 2022-03-31Tool for annealing of magnetic stacks
#4 | 2021-01-14Tool for annealing of magnetic stacks
#5 | 2020-07-30SELF CONTACTING BIT LINE TO MRAM CELL
#6 | 2020-07-16Memory cell layout for low current field-induced MRAM
#7 | 2017-10-05Tool for annealing of magnetic stacks
#8 | 2017-08-03Magnetic sidewalls for write lines in field-induced MRAM and methods of manufacturing them
#9 | 2016-12-01Methods for manufacturing carbon ribbons for magnetic devices
#10 | 2016-08-18Magnetic sidewalls for write lines in field-induced MRAM and methods of manufacturing them
#11 | 2016-02-11Self contacting bit line to MRAM cell
#12 | 2015-12-31Memory circuit and method of forming the same using reduced mask steps
#13 | 2015-12-10Integrated circuit with sensing unit and method for using the same
#14 | 2015-12-03Method for etching MTJ using co process chemistries
#15 | 2015-06-25Magnetic memory circuit with stress inducing layer
#16 | 2015-06-11Memory cell layout for low current field-induced MRAM
#17 | 2015-05-14Methods for manufacturing carbon ribbons for magnetic devices
#18 | 2015-02-05Memory cell with schottky diode
#19 | 2015-01-29Tool for annealing of magnetic stacks
#20 | 2015-01-22SELF CONTACTING BIT LINE TO MRAM CELL
#21 | 2014-12-02Methods for manufacturing carbon ribbons for magnetic devices
#22 | 2014-10-23Method for fabricating a circuit
#23 | 2014-10-23Field programming method for magnetic memory devices
#24 | 2014-10-09Memory cell with Schottky diode
#25 | 2014-09-25MEMORY CIRCUIT AND METHOD OF FORMING THE SAME USING REDUCED MASK STEPS
#26 | 2014-09-25Memory circuit and method of forming the same using reduced mask steps
#27 | 2014-09-11Method of etching MTJ using CO process chemistries
#28 | 2014-09-11MRAM wtih metal gate write conductors
#29 | 2014-07-01Field programming method for magnetic memory devices
#30 | 2014-05-20MRAM with metal gate write conductors
#31 | 2014-04-29Memory circuit and method of forming the same using reduced mask steps
#32 | 2014-04-03Magnetic sidewalls for write lines in field-induced MRAM and methods of manufacturing them
#33 | 2014-02-13Magnetic enhancement layer in memory cell
#34 | 2014-01-07Magnetic sidewalls for write lines in field-induced MRAM and methods of manufacturing them
#35 | 2013-11-21Semiconductor integrated circuit for low and high voltage operations
#36 | 2013-10-22Magnetic enhancement layer in memory cell
#37 | 2013-02-05Memory circuit with crossover zones of reduced line width conductors
#38 | 2012-04-12Semiconductor integrated circuit for low and high voltage operations
#39 | 2011-02-10Voltage boosting in MRAM current drivers
#40 | 2010-11-09Compact magnetic random access memory cell with slotted bit line and method of manufacturing same
#41 | 2010-09-02Magnetic booster for magnetic random access memory
#42 | 2010-08-19Magnetic memory cell and method of fabricating same
#43 | 2010-08-19Magnetic memory display driver system
#44 | 2009-06-04MRAM design with local write conductors of reduced cross-sectional area
#45 | 2009-05-21MAGNETIC MEMORY CELL BASED ON A MAGNETIC TUNNEL JUNCTION(MTJ) WITH LOW SWITCHING FIELD SHAPES
#46 | 2009-03-12Magnetic memory cell based on a magnetic tunnel junction (MTJ) with independent storage and read layers
#47 | 2009-03-05High density magnetic memory based on nanotubes
#48 | 2009-01-08MAGNETIC MEMORY DEVICE WITH NON-RECTANGULAR CROSS SECTION CURRENT CARRYING CONDUCTORS
#49 | 2008-11-13Programmable magnetic read only memory (MROM)
#50 | 2008-09-04Magnetic memory cell and method of fabricating same
#51 | 2006-12-28Apparatus and method of an executable-in-place flash device
#52 | 2006-05-11Solid state magnetic memory system and method
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