Inventor profile of:

Gilbert Cabillic

City:

Brece

Country:

France

Published Applications:

57

Last publication date:

2021-12-02

Top Assignees for applications by Gilbert Cabillic

The entities that hold a legal rights for patent applications filed by inventor Cabillic Gilbert:

Recent patent applications by Cabillic Gilbert

Gilbert Cabillic from Brece, FR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2021-12-02
US20210373863A1
Physics

Method for executing code portions on execution resources

#2 | 2019-02-28
US20190068446A1
Electricity

Determining network configurations for a modular computing entity

#3 | 2018-11-08
US20180321982A1
Physics

Modular electronic devices with contextual task management and performance

#4 | 2018-10-04
US20180285162A1
Physics

Determining Tasks to be Performed by a Modular Entity

#5 | 2018-09-27
US20180276048A1
Physics

Task management system for computer networks

#6 | 2017-10-19
US20170302517A1
Electricity

Determining network configurations for a modular computing entity

#7 | 2017-10-19
US20170300366A1
Physics

Determining tasks to be performed by a modular entity

#8 | 2017-10-19
US20170300365A1
Physics

Task management system for a modular electronic device

#9 | 2017-10-19
US20170300364A1
Physics

Modular electronic devices with prediction of future tasks and capabilities

#10 | 2017-10-19
US20170300363A1
Physics

Modular electronic devices with contextual task management and performance

#11 | 2017-03-16
US20170075667A1
Physics

Selective compiling method, device, and corresponding computer program product

#12 | 2014-04-17
US20140109068A1
Physics

Method for compiling an intermediate code of an application

#13 | 2014-04-17
US20140108600A1
Electricity

Application distribution supplying a dedicated application to a terminal from an application deposited by the developer

#14 | 2014-03-27
US20140089907A1
Physics

Method for providing an application as a library in a virtual machine

#15 | 2013-11-21
US20130311980A1
Physics

Selective compiling method, device, and corresponding computer program product

#16 | 2012-11-29
US20120304154A1
Physics

Software application fine-tuning method, system, and corresponding computer program product

#17 | 2011-10-04
US10151282
-

Energy-aware scheduling of application execution

#18 | 2009-07-21
US10831387
-

Embedded garbage collection

#19 | 2009-04-02
US20090089807A1
Physics

JEK class loader notification

#20 | 2009-04-02
US20090089750A1
Physics

Method and system of performing Java language class extensions

#21 | 2009-04-02
US20090089563A1
Physics

Method and system of performing thread scheduling

#22 | 2009-04-02
US20090089550A1
Physics

Java stack machine execution kernel dynamic instrumentation

#23 | 2009-02-24
US10831575
-

Accessing device driver memory in programming language representation

#24 | 2008-10-07
US10831388
-

Memory allocation in a multi-processor system

#25 | 2008-06-05
US20080134322A1
Physics

Micro-sequence based security model

#26 | 2008-06-05
US20080134212A1
Physics

Performing java interrupt with two program counters

#27 | 2008-05-29
US20080127048A1
Physics

Method and system of accessing display window memory

#28 | 2008-02-12
US10818584
-

Management of stack-based memory usage in a processor

#29 | 2006-02-02
US20060026580A1
Physics

Method and related system of dynamic compiler resolution

#30 | 2006-02-02
US20060026575A1
Physics

Method and system of adaptive dynamic compiler resolution

#31 | 2006-02-02
US20060026574A1
Physics

Method and apparatus for code optimization

#32 | 2006-02-02
US20060026571A1
Physics

Method and system of control flow graph construction

#33 | 2006-02-02
US20060026566A1
Physics

Method and system for thread abstraction

#34 | 2006-02-02
US20060026565A1
Physics

Method and system for implementing an interrupt handler

#35 | 2006-02-02
US20060026564A1
Physics

Method and system for implementing interrupt service routines

#36 | 2006-02-02
US20060026563A1
Physics

Method and system for managing virtual memory

#37 | 2006-02-02
US20060026412A1
Physics

Removing local RAM size limitations when executing software code

#38 | 2006-02-02
US20060026404A1
Physics

Method and system to construct a data-flow analyzer for a bytecode verifier

#39 | 2006-02-02
US20060026400A1
Physics

Automatic operand load, modify and store

#40 | 2006-02-02
US20060026398A1
Physics

Unpack instruction

#41 | 2006-02-02
US20060026397A1
Physics

Pack instruction

#42 | 2006-02-02
US20060026392A1
Physics

Method and system of informing a micro-sequence of operand width

#43 | 2006-02-02
US20060026391A1
Physics

Method and system for obtaining an immediate operand of a bytecode for use by a micro-sequence

#44 | 2006-02-02
US20060026390A1
Physics

Storing contexts for thread switching

#45 | 2006-02-02
US20060026370A1
Physics

Method and system for accessing indirect memories

#46 | 2006-02-02
US20060026357A1
Physics

Context save and restore with a stack-based memory structure

#47 | 2006-02-02
US20060026354A1
Physics

Cache memory usable as scratch pad storage

#48 | 2006-02-02
US20060026353A1
Physics

Memory usable in cache mode or scratch pad mode to reduce the frequency of memory accesses

#49 | 2006-02-02
US20060026322A1
Physics

Interrupt management in dual core processors

#50 | 2006-02-02
US20060026201A1
Physics

Method and system for multiple object representation

#51 | 2006-02-02
US20060026200A1
Physics

Method and system for shared object data member zones

#52 | 2006-02-02
US20060026183A1
Physics

Method and system provide concurrent access to a software object

#53 | 2006-02-02
US20060026126A1
Physics

Method and system for making a java system call

#54 | 2006-02-02
US20060025986A1
Physics

Method and system to emulate an M-bit instruction set

#55 | 2006-02-02
US20060023517A1
Physics

Method and system for dynamic address translation

#56 | 2006-01-12
US20060010237A1
Electricity

Device and method for managing data between communication facilities to obtain a mobile service

#57 | 2005-02-10
US20050033945A1
Physics

Dynamically changing the semantic of an instruction

InventorID:

542097 ⎘