Peter G. Tolchinsky

Techniques for monolithic co-integration of silicon and III-N semiconductor transistors

Silicon PMOS with gallium nitride NMOS for voltage regulation

GaN devices on engineered silicon substrates

Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition

Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby

Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition

Stacking fault and twin blocking barrier for integrating III-V on Si

High hole mobility p-channel Ge transistor structure on Si substrate

Back gate doping for SOI substrates

Group III-V devices with delta-doped layer under channel region

Methods of forming buffer layer architecture on silicon and structures formed thereby

Buffer layers for device isolation of devices grown on silicon

Dislocation removal from a group III-V film grown on a semiconductor substrate

Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer

VERTICAL SEMICONDUCTOR WAFER CARRIER

High hole mobility p-channel Ge transistor structure on Si substrate

Buffer layers for device isolation of devices grown on silicon

Dislocation-free InSb quantum well structure on Si using novel buffer architecture

Stacking fault and twin blocking barrier for integrating III-V on Si

Depositing polar materials on non-polar semiconductor substrates

Insulation layer for silicon-on-insulator wafer

Methods of vertically stacking wafers using porous silicon

Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer

Transistors with increased mobility in the channel zone and method of fabrication

Semiconductor wafers with non-standard crystal orientations and methods of manufacturing the same

Method for making a semiconductor device having increased carrier mobility

Method of forming silicon on insulator wafers

Devices and methods employing high thermal conductivity heat dissipation substrates