Vancouver, Washington
United States
24
2026-04-09
The entities that hold a legal rights for patent applications filed by inventor Davis Robin:
Robin Davis from Vancouver, US has applied for patents for these inventions. The list has both pending applications and granted patents:
MOLDED LAYERED BRIDGE AND METHOD OF MAKING THE SAME
#2 | 2026-03-053D BLOCK ATTACHED TO A SUBSTRATE IN A SEMICONDUCTOR PACKAGE
#3 | 2026-02-05FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA (TSV) VERTICAL INTERCONNECTS
#4 | 2026-01-08INTERCONNECT SUBSTRATE AND METHOD OF MAKING
#5 | 2025-09-04QUAD FLAT NO-LEAD (QFN) PACKAGE WITH TIE BARS AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE AND METHOD FOR MAKING THE SAME
#6 | 2025-08-28FULLY MOLDED STRUCTURE WITH MULTI-HEIGHT COMPONENTS COMPRISING BACKSIDE CONDUCTIVE MATERIAL AND METHOD FOR MAKING THE SAME
#7 | 2025-05-29SEMICONDUCTOR ASSEMBLY COMPRISING A 3D BLOCK AND METHOD OF MAKING THE SAME
#8 | 2025-04-03QUAD FLAT NO-LEAD (QFN) PACKAGE WITHOUT LEADFRAME AND WITH LAYER OF DIELECTRIC
#9 | 2024-12-19Fully molded structure with multi-height components comprising backside conductive material and method for making the same
#10 | 2024-12-05MOLDED DIRECT CONTACT INTERCONNECT SUBSTRATE AND METHODS OF MAKING SAME
#11 | 2024-11-28STACKABLE FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH VERTICAL INTERCONNECTS
#12 | 2024-07-18LAYERED MOLDED DIRECT CONTACT AND DIELECTRIC STRUCTURE AND METHOD FOR MAKING THE SAME
#13 | 2024-06-27ENCAPSULANT-DEFINED LAND GRID ARRAY (LGA) PACKAGE AND METHOD FOR MAKING THE SAME
#14 | 2024-06-27Semiconductor assembly comprising a 3D block and method of making the same
#15 | 2024-01-25QUAD FLAT NO-LEAD (QFN) PACKAGE WITH BACKSIDE CONDUCTIVE MATERIAL AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE AND METHOD FOR MAKING THE SAME
#16 | 2024-01-25QUAD FLAT NO-LEAD (QFN) PACKAGE WITHOUT LEADFRAME AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE
#17 | 2023-12-21Molded direct contact interconnect structure without capture pads and method for the same
#18 | 2023-11-30Molded direct contact interconnect structure without capture pads and method for the same
#19 | 2023-11-30Molded direct contact interconnect substrate and methods of making same
#20 | 2023-11-23FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA (TSV) VERTICAL INTERCONNECTS
#21 | 2023-09-05Quad flat no-lead (QFN) package without leadframe and direct contact interconnect build-up structure and method for making the same
#22 | 2023-07-27Stackable fully molded semiconductor structure with through silicon via (TSV) vertical interconnects and method of making the same
#23 | 2023-01-05Fully molded semiconductor structure with through silicon via (TSV) vertical interconnects
#24 | 2023-01-05Stackable fully molded semiconductor structure with through silicon via (TSV) vertical interconnects
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