Inventor profile of:

Muhammad Khellah

City:

Tigard, Oregon

Country:

United States

Published Applications:

34

Last publication date:

2026-04-30

Top Assignees for applications by Muhammad Khellah

The entities that hold a legal rights for patent applications filed by inventor Khellah Muhammad:

Recent patent applications by Khellah Muhammad

Muhammad Khellah from Tigard, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-30
US20260119493A1
Physics

PARALLEL PRUNING AND BATCH SORTING FOR SIMILARITY SEARCH ACCELERATORS

#2 | 2024-01-04
US20240005777A1
Physics

Management Agent for Real-Time Interpretable Telemetry

#3 | 2022-03-24
US20220091652A1
Physics

Unified retention and wake-up clamp apparatus and method

#4 | 2022-01-06
US20220006459A1
Electricity

Circuits and methods for supply voltage detection and timing monitoring

#5 | 2021-10-14
US20210319022A1
Physics

PARALLEL PRUNING AND BATCH SORTING FOR SIMILARITY SEARCH ACCELERATORS

#6 | 2021-08-05
US20210242872A1
Electricity

All-digital voltage monitor (ADVM) with single-cycle latency

#7 | 2021-08-05
US20210240142A1
Physics

Distributed and scalable all-digital low dropout integrated voltage regulator

#8 | 2021-06-24
US20210193196A1
Physics

Energy efficient memory array with optimized burst read and write data access

#9 | 2020-11-12
US20200358443A1
Electricity

Current steering level-shifter

#10 | 2020-09-22
US16783096
Electricity

All-digital voltage monitor (ADVM) with single-cycle latency

#11 | 2020-09-22
US16413110
Electricity

Minimum delay error detection and correction for pulsed latches

#12 | 2020-05-26
US16229617
Electricity

Current steering level-shifter

#13 | 2020-03-12
US20200081512A1
Physics

All-digital closed loop voltage generator

#14 | 2020-01-02
US20200005468A1
Physics

METHOD AND SYSTEM OF EVENT-DRIVEN OBJECT SEGMENTATION FOR IMAGE PROCESSING

#15 | 2019-12-19
US20190385657A1
Physics

HIGH DENSITY NEGATIVE DIFFERENTIAL RESISTANCE BASED MEMORY

#16 | 2019-09-19
US20190288681A1
Electricity

Charge injector with integrated level shifter for localized mitigation of supply voltage droop

#17 | 2019-08-08
US20190243440A1
Physics

Reliable digital low dropout voltage regulator

#18 | 2019-08-06
US15916130
Electricity

Low power retention flip-flop with level-sensitive scan circuitry

#19 | 2019-04-18
US20190115011A1
Physics

Detecting keywords in audio using a spiking neural network

#20 | 2019-02-07
US20190044512A1
Electricity

Calibrated biasing of sleep transistor in integrated circuits

#21 | 2019-02-07
US20190043477A1
Physics

Method and system of temporal-domain feature extraction for automatic speech recognition

#22 | 2018-10-04
US20180287592A1
Electricity

Adaptive voltage system for aging guard-band reduction

#23 | 2018-06-14
US20180166145A1
Physics

Retention minimum voltage determination techniques

#24 | 2016-08-11
US20160232968A1
Physics

Memory cell with retention using resistive memory

#25 | 2016-08-04
US20160225419A1
Physics

Assist circuit for memory

#26 | 2015-10-01
US20150279438A1
Physics

Assist circuit for memory

#27 | 2013-01-24
US20130024752A1
Physics

Memory cell supply voltage control based on error detection

#28 | 2012-05-03
US20120106285A1
Physics

Circuits and methods for reducing minimum supply for register file cells

#29 | 2011-12-15
US20110307761A1
Physics

Memory cell supply voltage control based on error detection

#30 | 2010-06-24
US20100157705A1
Physics

Register file circuits with P-type evaluation

#31 | 2010-06-10
US20100146368A1
Electricity

Performing multi-bit error correction on a cache line

#32 | 2010-05-13
US20100118637A1
Physics

Circuits and methods for reducing minimum supply for register file cells

#33 | 2008-07-03
US20080162986A1
Physics

Memory cell bit valve loss detection and restoration

#34 | 2005-07-07
US20050145935A1
Physics

Method for making memory cell without halo implant

InventorID:

57490 ⎘