Boise, Idaho
United States
71
2026-06-11
The entities that hold a legal rights for patent applications filed by inventor Smith Michael A.:
Michael A. Smith from Boise, US has applied for patents for these inventions. The list has both pending applications and granted patents:
APPARATUS WITH BREAKDOWN VOLTAGE MANAGEMENT MECHANISM AND METHODS FOR OPERATING THE SAME
#2 | 2026-05-07Memory Circuitry And Methods Used In Forming Memory Circuitry
#3 | 2026-01-29SEMICONDUCTOR MEMORY DEVICE AND METHOD THEREOF
#4 | 2026-01-22METAL GATED LIGHTLY DOPED DRAIN STRING DRIVER DEVICE AND METHOD THEREOF
#5 | 2026-01-15REDUCED PITCH MEMORY SUBSYSTEM FOR MEMORY DEVICE
#6 | 2025-09-18TRANSISTOR WITH GATE ATTACHED FIELD PLATE
#7 | 2025-07-17INTEGRATED CIRCUIT STRUCTURES COMPRISING AN ISOLATION STRUCTURE WITH DIFFERENT DEPTHS
#8 | 2025-06-26HIGH VOLTAGE ISOLATION DEVICES FOR SEMICONDUCTOR DEVICES
#9 | 2025-06-12ACTIVE PROTECTION CIRCUITS FOR SEMICONDUCTOR DEVICES
#10 | 2024-12-26INTERLEAVED STRING DRIVERS, STRING DRIVER WITH NARROW ACTIVE REGION, AND GATED LDD STRING DRIVER
#11 | 2024-09-26HIGH VOLTAGE DIODES FOR WAFER ON WAFER PACKAGING OF SEMICONDUCTOR DEVICE
#12 | 2024-08-29STRING DRIVER WITH THROUGH SILICON ISOLATION
#13 | 2024-08-15STRING DRIVER WITH DEEP TRENCH ISOLATIONS
#14 | 2024-08-15STRING DRIVER CONNECTIONS FOR WAFER ON WAFER PACKAGING
#15 | 2024-07-11REDUCED PITCH MEMORY SUBSYSTEM FOR MEMORY DEVICE
#16 | 2024-05-09High voltage isolation devices for semiconductor devices
#17 | 2024-03-28Methods of forming integrated circuit structures comprising isolation structures with different depths
#18 | 2024-02-29APPARATUS INCLUDING ADJUSTED WELLS AND METHODS OF MANUFACTURING THE SAME
#19 | 2024-02-01APPARATUSES INCLUDING CAPACITORS INCLUDING MULTIPLE DIELECTRIC MATERIALS
#20 | 2023-12-07INTERFACES BETWEEN HIGHER VOLTAGE AND LOWER VOLTAGE WAFERS AND RELATED APPARATUSES AND METHODS
#21 | 2023-12-07Interleaved string drivers, string driver with narrow active region, and gated LDD string driver
#22 | 2023-11-30TRANSISTOR WITH GATE ATTACHED FIELD PLATE
#23 | 2023-08-31Active protection circuits for semiconductor devices
#24 | 2023-04-20Reduced pitch memory subsystem for memory device
#25 | 2023-04-13Transistor with implant screen
#26 | 2023-02-16Interleaved string drivers, string driver with narrow active region, and gated LDD string driver
#27 | 2023-02-16Memory with a source plate discharge circuit
#28 | 2023-01-24Transistor with implant screen
#29 | 2022-12-01High voltage isolation devices for semiconductor devices
#30 | 2022-10-06Apparatuses including capacitors including multiple dielectric materials, and related methods
#31 | 2022-05-26Active protection circuits for semiconductor devices
#32 | 2022-05-12High voltage isolation devices for semiconductor devices
#33 | 2022-02-10Integrated circuit structures comprising an isolation structure with different depths
#34 | 2022-02-10Reduced pitch memory subsystem for memory device
#35 | 2022-01-13Semiconductor device protection circuits, and associated methods, devices, and systems
#36 | 2021-12-30Methods of forming circuit-protection devices
#37 | 2021-10-14Semiconductor device protection circuits for protecting a semiconductor device during processing thereof, and associated methods, devices, and systems
#38 | 2021-08-26High-voltage switch with integrated well region
#39 | 2021-03-11Electronic devices including capacitors with multiple dielectric materials, and related systems
#40 | 2021-02-04Isolation structures for integrated circuit devices
#41 | 2020-06-11Microelectronic devices including capacitor structures and methods of forming microelectronic devices
#42 | 2019-12-19Devices including stack structures, and related methods and electronic systems
#43 | 2019-12-05Circuit-protection devices
#44 | 2019-12-05Methods of forming circuit-protection devices
#45 | 2019-08-29Memory devices, semiconductor devices and related methods
#46 | 2019-08-29Methods of forming semiconductor devices
#47 | 2019-07-04Methods of forming circuit-protection devices
#48 | 2019-03-28Three-dimensional memory devices, and related methods and electronic systems
#49 | 2018-11-29Methods of forming semiconductor device structures, and related semiconductor device structures, semiconductor devices, and electronic systems
#50 | 2018-10-11Transistors
#51 | 2018-06-21Memory devices, semiconductor devices and related methods
#52 | 2018-05-10Semiconductor devices including stair-step structures
#53 | 2017-04-20Conductive structures, systems and devices including conductive structures and related methods
#54 | 2017-03-09Integrated circuitry and methods of forming transistors
#55 | 2017-01-26Apparatuses including stair-step structures and methods of forming the same
#56 | 2016-04-07Integrated circuitry and methods of forming transistors
#57 | 2016-03-10Transistors having one or more dummy lines with different collective widths coupled thereto
#58 | 2015-08-20Methods of forming transistors with broken up active regions
#59 | 2015-07-30Apparatuses including stair-step structures and methods of forming the same
#60 | 2014-11-20Transistors having features which preclude straight-line lateral conductive paths from a channel region to a source/drain region
#61 | 2014-11-20Integrated circuitry comprising transistors with broken up active regions
#62 | 2014-10-09Conductive structures, systems and devices including conductive structures and related methods
#63 | 2013-12-26Apparatuses including stair-step structures and methods of forming the same
#64 | 2012-12-06Conductive structures, systems and devices including conductive structures and related methods
#65 | 2012-12-06Apparatuses including stair-step structures and methods of forming the same
#66 | 2011-06-16Depletion mode circuit protection device
#67 | 2010-11-04Semiconductor constructions
#68 | 2009-11-12Isolation trench structure
#69 | 2009-09-03NAND FLASH PERIPHERAL CIRCUITRY FIELD PLATE
#70 | 2009-03-19Semiconductor constructions, and electronic systems
#71 | 2007-02-08Semiconductor processing methods
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