Inventor profile of:

Shayan Kaviani

City:

Phoenix, Arizona

Country:

United States

Published Applications:

30

Last publication date:

2026-06-18

Top Assignees for applications by Shayan Kaviani

The entities that hold a legal rights for patent applications filed by inventor Kaviani Shayan:

Recent patent applications by Kaviani Shayan

Shayan Kaviani from Phoenix, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-06-18
US20260173934A1
Electricity

THROUGH GLASS VIAS WITH MULTILAYERED ORGANIC/INORGANIC LINER FOR INTEGRATED CIRCUIT DEVICE PACKAGES

#2 | 2026-05-07
US20260130245A1
Electricity

MICROELECTRONIC ASSEMBLIES INCLUDING MULTIPLE LINERS IN THROUGH-GLASS VIAS

#3 | 2026-03-26
US20260090426A1
Electricity

SEMICONDUCTOR CORE LAYER INCLUDING GLASS SHEET HAVING EDGE PROTECTION STRUCTURE AND METHOD OF MAKING SAME

#4 | 2026-03-19
US20260082970A1
Electricity

INTEGRATED CIRCUIT PACKAGES INCLUDING A GLASS-CORE SUBSTRATE

#5 | 2026-01-01
US20260005115A1
Electricity

METHODS AND SYSTEMS FOR FORMING INTEGRATED CIRCUIT PACKAGES COMPRISING GLASS LAYERS

#6 | 2026-01-01
US20260005082A1
Electricity

GLASS CORE EDGE TREATMENTS FOR HYBRID PANELS IN DEVICE PACKAGING

#7 | 2026-01-01
US20260005081A1
Electricity

HYBRID GLASS AND ORGANIC SUBSTRATES

#8 | 2025-10-02
US20250309148A1
Electricity

SUBSTRATE WITH COMPONENT EMBEDDED IN A BLIND CAVITY

#9 | 2025-09-04
US20250279346A1
Electricity

HIGH ASPECT RATIO VIAS WITH LOW STRESS IN INTEGRATED CIRCUIT PACKAGES

#10 | 2025-07-03
US20250218962A1
Electricity

TECHNOLOGIES FOR A STACK OF COMPONENTS EMBEDDED IN A SUBSTRATE CORE

#11 | 2025-07-03
US20250218956A1
Electricity

METHODS AND APPARATUS FOR MOUNTING SEMICONDUCTOR DEVICES IN CAVITIES

#12 | 2025-07-03
US20250218929A1
Electricity

EMBEDDED DEEP TRENCH CAPACITORS IN INTEGRATED CIRCUIT DEVICE PACKAGE SUBSTRATES

#13 | 2025-07-03
US20250218881A1
Electricity

LIQUID-BASED METHOD FOR EMBEDDING COMPONENTS IN THICK SUBSTRATES

#14 | 2025-06-26
US20250210506A1
Electricity

PASSIVATION BOUNDARY DEFECTS FOR REDUCED LEAKAGE CURRENT CAPACITOR DIELECTRIC MATERIALS

#15 | 2025-06-26
US20250210426A1
Electricity

MICROELECTRONIC ASSEMBLIES WITH STRENGTHENED GLASS CORES

#16 | 2025-06-05
US20250183182A1
Electricity

MICROELECTRONIC ASSEMBLIES WITH THROUGH-GLASS VIA STRESS ALLEVIATION IN GLASS CORES

#17 | 2025-04-24
US20250132239A1
Electricity

POROUS LINERS FOR THROUGH-GLASS VIAS AND ASSOCIATED METHODS

#18 | 2025-03-27
US20250106997A1
Electricity

ELECTROLESS SEED LAYER DEPOSITION ON GLASS CORE SUBSTRATES

#19 | 2025-01-09
US20250014954A1
Electricity

HYBRID CORES INCLUDING ADHESIVE PROMOTION LAYERS AND RELATED METHODS

#20 | 2025-01-02
US20250006781A1
Electricity

CARBON NANOFIBER CAPACITOR APPARATUS AND RELATED METHODS

#21 | 2025-01-02
US20250006671A1
Electricity

SEMICONDUCTOR LAYER WITH DRY DEPOSITION LAYER

#22 | 2024-07-04
US20240222018A1
Electricity

SUBSTRATE PACKAGE-INTEGRATED OXIDE CAPACITORS AND RELATED METHODS

#23 | 2024-06-27
US20240213301A1
Electricity

THIN FILM CAPACITOR (TFC) ARCHITECTURES FOR PACKAGE SUBSTRATES

#24 | 2024-06-27
US20240213132A1
Electricity

THIN FILM CAPACITORS (TFCS) IN ETCHED BACK DEEP VIA

#25 | 2024-06-06
US20240186136A1
Electricity

POLYMERIC FILMS AS AN ADHESIVE PROMOTION/BUFFER LAYER AT GLASS-DIELECTRIC OR METAL-DIELECTRIC INTERFACES

#26 | 2024-04-04
US20240113048A1
Electricity

INTEGRATED HORIZONTAL VARISTOR ON GLASS CORE FOR VOLTAGE REGULATION

#27 | 2024-04-04
US20240113046A1
Electricity

EMBEDDED THIN FILM VARISTOR IN THROUGH GLASS VIAS

#28 | 2024-03-28
US20240107784A1
Electricity

METHODS AND APPARATUS UTILIZING CONJUGATED POLYMERS IN INTEGRATED CIRCUIT PACKAGES WITH GLASS SUBSTRATES

#29 | 2024-03-21
US20240096561A1
Electricity

THIN FILM CAPACITORS

#30 | 2023-09-21
US20230298971A1
Electricity

MICROELECTRONIC STRUCTURE INCLUDING CONDUCTIVE POLYMER IN TRENCHES OF A CORE SUBSTRATE, AND METHOD OF MAKING SAME

InventorID:

5857699 ⎘