Sinzing
Germany
45
2026-05-28
The entities that hold a legal rights for patent applications filed by inventor Kessler Angela:
Angela Kessler from Sinzing, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
INTEGRATED POWER STAGE ASSEMBLY WITH ACTIVE/INACTIVE REGIONS
#2 | 2026-01-15Embedded Package with Shielding Pad
#3 | 2025-07-03PACKAGE WITH COMPONENT-CARRYING INTERMEDIATE STRUCTURE AND ADDITIONAL CARRIER HAVING REFERENCE POTENTIAL STRUCTURE
#4 | 2025-06-05POWER STAGE PACKAGE WITH HALF BRIDGE-CONNECTED TRANSISTOR CHIPS AND DRIVER CHIP HAVING THROUGH CONNECTION
#5 | 2025-05-29ENCAPSULATED PACKAGE WITH CARRIER, LAMINATE BODY AND COMPONENT IN BETWEEN
#6 | 2025-02-06POWER MODULE WITH INDUCTOR-COOLED POWER STAGE
#7 | 2025-01-09DIE EMBEDDED PACKAGE AND METHOD OF FORMING A DIE EMBEDDED PACKAGE
#8 | 2024-12-12Method of Forming a Semiconductor Module
#9 | 2024-10-10Die Package and Method of Manufacturing a Die Package
#10 | 2024-09-19Embedded Package with Shielding Pad
#11 | 2024-07-25INDUCTOR CONNECTIVITY AND ASSEMBLIES
#12 | 2024-03-28CHIP PACKAGE, METHOD OF FORMING A CHIP PACKAGE, AND CHIP SYSTEM
#13 | 2024-03-07Semiconductor package and passive element with interposer
#14 | 2024-02-08Method of forming a semiconductor module
#15 | 2024-01-25MODULAR POWER DEVICE PACKAGE EMBEDDED IN CIRCUIT CARRIER
#16 | 2023-11-16Voltage regulator module with inductor-cooled power stage
#17 | 2023-11-16Multi-Device Power Module Arrangement
#18 | 2023-11-16Semiconductor Device Package Thermally Coupled to Passive Element
#19 | 2023-08-10Semiconductor module having a multi-branch switch node connector
#20 | 2023-06-22Semiconductor Devices Including a Premolded Leadframe and a Semiconductor Package
#21 | 2022-08-18Semiconductor package and passive element with interposer
#22 | 2022-08-11Package with clip having through hole accommodating component-related structure
#23 | 2022-04-07Semiconductor module
#24 | 2022-03-24Semiconductor module
#25 | 2021-09-16Semiconductor devices including parallel electrically conductive layers
#26 | 2021-02-04ENCAPSULATED PACKAGE WITH CARRIER, LAMINATE BODY AND COMPONENT IN BETWEEN
#27 | 2021-02-04SEMICONDUCTOR PACKAGE INCLUDING A CAVITY IN ITS PACKAGE BODY
#28 | 2020-12-24Die package and method of manufacturing a die package
#29 | 2020-06-04Package comprising chip contact element of two different electrically conductive materials
#30 | 2019-05-23Package with interconnections having different melting temperatures
#31 | 2019-01-03Molded package with chip carrier comprising brazed electrically conductive layers
#32 | 2018-09-11Molded package with chip carrier comprising brazed electrically conductive layers
#33 | 2018-05-17Package with interconnections having different melting temperatures
#34 | 2018-04-12Chip carrier with electrically conductive layer extending beyond thermally conductive dielectric sheet
#35 | 2018-04-05Chip packages, chip arrangements, a circuit board, and methods for manufacturing chip packages
#36 | 2018-04-05Chip carrier configured for delamination-free encapsulation and stable sintering
#37 | 2017-09-28Redirecting solder material to visually inspectable package surface
#38 | 2016-10-27Circuit board embedding a power semiconductor chip
#39 | 2016-02-04Encapsulated electronic chip device with mounting provision and externally accessible electric connection structure
#40 | 2015-06-11Semiconductor device including multiple semiconductor chips and a laminate
#41 | 2015-05-14Semiconductor package comprising a transistor chip module and a driver chip module and a method for fabricating the same
#42 | 2015-04-09Chip packages, chip arrangements, a circuit board, and methods for manufacturing chip packages
#43 | 2014-11-06Integration of current measurement in wiring structure of an electronic circuit
#44 | 2014-01-02CHIP PACKAGES, CHIP ARRANGEMENTS, A CIRCUIT BOARD, AND METHODS FOR MANUFACTURING CHIP PACKAGES
#45 | 2009-02-12Semiconductor device with semiconductor chip and method for producing it
592909 ⎘