Bayan Lepas
Malaysia
70
2026-02-26
The entities that hold a legal rights for patent applications filed by inventor Teh Chee Hak:
Chee Hak Teh from Bayan Lepas, MY has applied for patents for these inventions. The list has both pending applications and granted patents:
INSTANTIATABLE AND STAMPABLE PARTITIONS FOR NETWORK-ON-CHIP ARCHITECTURE AND METHOD OF PROCESSING DATA USING THEREOF
#2 | 2026-02-05Fabric Die to Fabric Die Interconnect for Modularized Integrated Circuit Devices
#3 | 2025-07-31NETWORK-ON-CHIP REGION-BASED ROUTING TABLE GENERATION METHOD
#4 | 2025-06-05OFFSET CALIBRATION METHOD AND APPARATUS FOR HIGH BANDWIDTH MEMORY 3 (HBM3)
#5 | 2025-05-01SYSTEM AND A METHOD FOR NETWORK-ON-CHIP POWER MANAGEMENT
#6 | 2025-03-06MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
#7 | 2025-01-30MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE
#8 | 2024-09-19Fabric Die to Fabric Die Interconnect for Modularized Integrated Circuit Devices
#9 | 2024-09-05NETWORK-ON-CHIP PACKETIZATION AND ROUTING METHOD AND APPARATUS FOR SCALABLE HIGH-PERFORMANCE NETWORKING ON AND OFF CHIP
#10 | 2024-09-05Scalable Network-on-Chip for High-Bandwidth Memory
#11 | 2024-06-13SYSTEM AND A METHOD FOR ALIGNING A PROGRAMMABLE CLOCK OR STROBE
#12 | 2024-05-16Method and a system for network-on-chip arbitration
#13 | 2024-04-18System and method for transferring configuration, management, debug information and asynchronous events between network-on-chip (NOC) and external interface
#14 | 2024-02-29METHOD OF DEBUGGING NETWORK-ON-CHIP
#15 | 2023-12-21SCALABLE 2.5D INTERFACE CIRCUITRY
#16 | 2023-11-23Fabric die to fabric die interconnect for modularized integrated circuit devices
#17 | 2023-09-28Modular periphery tile for integrated circuit device
#18 | 2023-07-20Method and apparatus of receive enable margining in memory interface
#19 | 2023-05-04Scalable network-on-chip for high-bandwidth memory
#20 | 2023-04-27Memory controller system and a method of pre-scheduling memory transaction for a storage device
#21 | 2022-08-11Memory controller for improving data integrity and providing data security and a method of operating thereof
#22 | 2022-06-23Modular periphery tile for integrated circuit device
#23 | 2022-06-23Micro-network-on-chip and microsector infrastructure
#24 | 2022-05-05APPLICATION-BASED DYNAMIC HETEROGENEOUS MANY-CORE SYSTEMS AND METHODS
#25 | 2022-04-21Scalable 2.5D interface circuitry
#26 | 2022-03-24Frequency translation circuitry for an interconnection in an active interposer of a semiconductor package
#27 | 2022-01-13Integrated circuits having memory with flexible input-output circuits
#28 | 2021-09-30Network-on-chip for inter-die and intra-die communication in modularized integrated circuit devices
#29 | 2021-04-15Fabric die to fabric die interconnect for modularized integrated circuit devices
#30 | 2021-03-11Periphery shoreline augmentation for integrated circuits
#31 | 2021-01-14Scalable 2.5D interface circuitry
#32 | 2020-07-16Modular periphery tile for integrated circuit device
#33 | 2020-07-16Scalable 2.5D interface circuitry
#34 | 2020-04-30Translation circuitry for an interconnection in an active interposer of a semiconductor package
#35 | 2020-04-16MEMORY CONTROLLER ARCHITECTURE WITH IMPROVED MEMORY SCHEDULING EFFICIENCY
#36 | 2020-04-02Periphery shoreline augmentation for integrated circuits
#37 | 2020-03-05Scalable 2.5D interface circuitry
#38 | 2020-03-03Interface architecture for master-to-master and slave-to-master communication
#39 | 2019-10-24Fabric die to fabric die interconnect for modularized integrated circuit devices
#40 | 2019-10-03Dynamic major mode for efficient memory traffic control
#41 | 2019-08-20Synchronize-able modular physical layer architecture for scalable interface
#42 | 2019-07-25Network-on-chip for inter-die and intra-die communication in modularized integrated circuit devices
#43 | 2019-07-25Memory interface circuitry with distributed data reordering capabilities
#44 | 2019-07-18Die to die interconnect structure for modularized integrated circuit devices
#45 | 2019-07-11Integrated circuits having memory with flexible input-output circuits
#46 | 2019-06-27Scaling interface architecture between memory and programmable logic
#47 | 2019-05-09Modular periphery tile for integrated circuit device
#48 | 2019-05-09Scalable network-on-chip for high-bandwidth memory
#49 | 2019-05-07Memory interface circuitry with distributed data reordering capabilities
#50 | 2019-05-02Addressable distributed memory in a programmable logic device
#51 | 2019-03-28Modular interconnection repair of multi-die package
#52 | 2018-09-18Modular interconnection repair of multi-die package
#53 | 2018-08-23Methods and apparatus for controlling interface circuitry
#54 | 2018-07-26Memory controller architecture with improved memory scheduling efficiency
#55 | 2018-06-07Application-based dynamic heterogeneous many-core systems and methods
#56 | 2018-05-15Scalable 2.5D interface circuitry
#57 | 2018-04-12METHODS AND APPARATUS FOR MANAGING APPLICATION-SPECIFIC POWER GATING ON MULTICHIP PACKAGES
#58 | 2018-04-12Methods and apparatus for dynamically configuring soft processors on an integrated circuit
#59 | 2018-03-15Memory controller architecture with improved memory scheduling efficiency
#60 | 2018-03-08Scalable 2.5D interface architecture
#61 | 2018-03-06Memory controller architecture with improved memory scheduling efficiency
#62 | 2017-12-28Methods and apparatus for smart memory interface
#63 | 2017-12-19Scalable architecture for IP block integration
#64 | 2017-11-07Memory controller architecture with improved memory scheduling efficiency
#65 | 2017-02-16Application-based dynamic heterogeneous many-core systems and methods
#66 | 2016-06-09METHODS AND APPARATUS FOR TESTING AUXILIARY COMPONENTS IN A MULTICHIP PACKAGE
#67 | 2016-04-07Scalable 2.5D interface architecture
#68 | 2014-04-17Interface logic for a multi-core system-on-a-chip (SoC)
#69 | 2014-01-02Protected access to virtual memory
#70 | 2013-01-03Controllable transaction synchronization for merging peripheral devices
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