JUN HEE YOO

System interconnect and operating method of system interconnect

Test method of semiconductor memory device and semiconductor memory system transferring fail address data from a volatile to a non-volatile memory array using an error-correction code engine

Semiconductor devices including application processor connected to high-bandwidth memory and low-bandwidth memory, and channel interleaving method thereof

MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, OPERATING METHOD THEREOF

Adaptive service controller, system on chip and method of controlling the same

Memory system for continuously mapping addresses of a memory module having defective locations

Method of managing dynamic memory reallocation and device performing the method