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Inventor profile of:

PETER J. SMITH

City:

Folsom, California

Country:

United States

Published Applications:

8

Last publication date:

2015-04-02

Top Assignees for applications by PETER J. SMITH

The entities that hold a legal rights for patent applications filed by inventor SMITH PETER J.:

  • INTEL CORPORATION 7 Santa Clara, CA United States

Recent patent applications by SMITH PETER J.

PETER J. SMITH from Folsom, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-04-02
US20150095609A1
Physics

Apparatus and method for compressing a memory address

#2 | 2014-07-08
US13929102
-

Alignment of microarchitectural conditions

#3 | 2014-03-13
US20140071784A1
Physics

Frequency selection granularity for integrated circuits

#4 | 2009-07-02
US20090172285A1
Physics

Tracking temporal use associated with cache evictions

#5 | 2006-09-28
US20060218351A1
Physics

Look ahead LRU array update scheme to minimize clobber in sequentially accessed memory

#6 | 2006-02-16
US20060036834A1
Physics

Trace reuse

#7 | 2005-06-23
US20050138341A1
Physics

Method and apparatus for a stew-based loop predictor

#8 | 2005-02-24
US20050044318A1
Physics

Method and apparatus for a trace cache trace-end predictor

InventorID:

684716 ⎘

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