Van H. Le

THIN FILM TRANSISTORS HAVING REPLACEMENT CONTACT METALLIZATION

THIN FILM TRANSISTORS HAVING RECESSED CONTACT METALLIZATION

THIN FILM TRANSISTORS HAVING ETCHED CONTACT METALLIZATION

THIN FILM TRANSISTORS HAVING MULTI-LAYER CONTACT METALLIZATION

THIN FILM TRANSISTORS HAVING COMBINED VIA AND GATE ELECTRODE

THIN FILM TRANSISTORS HAVING SELF-ALIGNED CONTACT METALLIZATION

THIN FILM TRANSISTORS HAVING IMPLANT REPAIR

ONE-TRANSISTOR MEMORY CELL WITH A CHANNEL REGION AROUND SOURCE AND DRAIN REGIONS

THROUGH-SILICON VIA BENEATH MEMORY ARRAY

INTEGRATED CIRCUIT ASSEMBLIES

LAYERED THIN FILM MATERIALS FOR TRANSISTOR CHANNELS

MEMORY LAYERS AT OPPOSING SIDES OF A COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR LAYER

CONNECTIONS OF BIT LINES AND WORD LINES IN STACKED MEMORY LAYERS TO A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR LAYER

DIRECT BONDING IN MICROELECTRONIC ASSEMBLIES

TOP-GATE DOPED THIN FILM TRANSISTOR

Dual gate control for trench shaped thin film transistors

Thin film transistors having double gates

MULTI-TIER MEMORY STRUCTURE WITH GRADED CHARACTERISTICS

DOPING CONTACTS OF THIN FILM TRANSISTORS

MULTI-LAYERED OR GRADED SEMICONDUCTOR REGION IN THIN FILM TRANSISTOR (TFT) STRUCTURES

LATERALLY RECESSED GATE ELECTRODE IN THIN FILM TRANSISTORS

ASYMMETRIC SOURCE AND DRAIN CONTACTS FOR A THIN FILM TRANSISTOR (TFT) STRUCTURE

DIELECTRIC SIDEWALL FEATURES FOR TUNING THIN FILM TRANSISTOR (TFT) PARASITICS

MULTI-LAYERED OR GRADED GATE DIELECTRIC IN THIN FILM TRANSISTOR (TFT) STRUCTURES

MULTI-LAYERED SOURCE AND DRAIN CONTACTS FOR A THIN FILM TRANSISTOR (TFT) STRUCTURE

CO-DOPING OF THIN FILM TRANSISTORS

AIRGAPS USED IN BACKEND MEMORY STRUCTURES

IMPLANTATION THROUGH AN ETCH STOP LAYER

PUNCH-THROUGH INTERCONNECT FEATURE TO COUPLE UPPER ELECTRODES OF CAPACITORS OF MULTI-LEVEL MEMORY ARRAYS

Quantum dot devices with fins

TRANSISTOR DEVICES WITH HIGH-K PEROVSKITE GATE DIELECTRICS

TRANSISTORS WITH FERROELECTRIC GATES

Two transistor memory cell using stacked thin-film transistors

GRAPHITIC CARBON CONTACTS FOR DEVICES WITH OXIDE CHANNELS

THIN-FILM TRANSISTORS WITH SHARED CONTACTS

THREE-DIMENSIONAL TRANSISTOR WITH FIN-SHAPED GATE

INTEGRATED THERMOELECTRIC DEVICE TO MITIGATE INTEGRATED CIRCUIT HOT SPOTS

INTEGRATED CIRCUIT DEVICES WITH FINFETS OVER GATE-ALL-AROUND TRANSISTORS

TWO TRANSISTOR CAPACITORLESS MEMORY CELL WITH STACKED THIN-FILM TRANSISTORS

STACKED MEMORY STRUCTURE WITH DUAL-CHANNEL TRANSISTOR

BILAYER MEMORY STACKING WITH LINES SHARED BETWEEN BOTTOM AND TOP MEMORY LAYERS

BILAYER MEMORY STACKING WITH COMPUTER LOGIC CIRCUITS SHARED BETWEEN BOTTOM AND TOP MEMORY LAYERS

STRUCTURES AND METHODS FOR MEMORY CELLS

STACKED RANDOM-ACCESS MEMORY DEVICES

INTEGRATED CIRCUIT ASSEMBLIES WITH STACKED COMPUTE LOGIC AND MEMORY DIES

MEMORY CELLS WITH NON-PLANAR FERROELECTRIC OR ANTIFERROELECTRIC MATERIALS

BACK-SIDE REVEAL FOR POWER DELIVERY TO BACKEND MEMORY

METALLIC SEALANTS IN TRANSISTOR ARRANGEMENTS

BACKEND MEMORY WITH AIR GAPS IN UPPER METAL LAYERS

THREE-DIMENSIONAL TRANSISTOR ARRANGEMENTS WITH RECESSED GATES

HYBRID MANUFACTURING WITH MODIFIED VIA-LAST PROCESS

Stacked backend memory with resistive switching devices

Top-gate doped thin film transistor

Metal-assisted single crystal transistors

TRANSISTOR CHANNEL MATERIALS

TRANSISTORS, MEMORY CELLS, AND ARRANGEMENTS THEREOF

Transistors, memory cells, and arrangements thereof

INTEGRATED CIRCUIT ASSEMBLIES

Compute near memory with backend memory

Quantum dot devices with fins

Direct bonding in microelectronic assemblies

SELECTOR DEVICES

Dual gate control for trench shaped thin film transistors

Quantum well stacks for quantum dot devices

Applications of back-end-of-line (BEOL) capacitors in compute-in-memory (CIM) circuits

Quantum dot devices with trenched substrates

Monolithic memory stack

Deep gate-all-around semiconductor device having germanium or group III-V active layer

Fabrication of non-planar IGZO devices for improved electrostatics

Transistors with ferroelectric spacer and methods of fabrication

Vertical memory cell with self-aligned thin film transistor

Encapsulation layers of thin film transistors

Thin film transistors having double gates

DUAL TRANSISTOR GATE WORKFUNCTIONS AND RELATED APPARATUSES, SYSTEMS, AND METHODS

Metal-assisted single crystal transistors

Air gap for thin film transistors

Compute near memory with backend memory

Thin-film transistors with low contact resistance

Self-aligned contacts for thin film transistors

SPACER-PATTERNED INVERTERS BASED ON THIN-FILM TRANSISTORS

Quantum dot devices with back gates

Thin film transistor with charge trap layer

Selector devices

Multi-chip module having a stacked logic chip and memory stack

QUANTUM DOT DEVICES

TRANSISTORS WITH FERROELECTRIC GATES

TWO TRANSISTOR MEMORY CELL USING STACKED THIN-FILM TRANSISTORS

Thin film cap to lower leakage in low band gap material devices

Structures and methods for memory cells

Vertical transistor devices and techniques

Access transmission gate

Nanowire thin film transistors with textured semiconductors

Stacked thin-film transistor based embedded dynamic random-access memory

Resistive memory devices with transition metal dichalcogenide (TMD) materials as ballast resistors to control current flow through the devices

Vertical field effect transistors (VFETs) with self-aligned wordlines

TUNNELING CONTACTS FOR A TRANSISTOR

Thin film transistors with a crystalline oxide semiconductor source/drain

Quantum dot devices with modulation doped stacks

Vertical transistor devices and techniques

Quantum dot devices with gate interface materials