Inventor profile of:

Ran Yan

City:

Dresden

Country:

Germany

Published Applications:

30

Last publication date:

2024-03-14

Top Assignees for applications by Ran Yan

The entities that hold a legal rights for patent applications filed by inventor Yan Ran:

Recent patent applications by Yan Ran

Ran Yan from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-03-14
US20240087502A1
Physics

SYSTEM FOR CONTROLLING THE BRIGHTNESS OF A DISPLAY

#2 | 2018-12-20
US20180366579A1
Electricity

LATERALLY DIFFUSED FIELD EFFECT TRANSISTOR IN SOI CONFIGURATION

#3 | 2017-11-02
US20170317161A1
Electricity

Method of forming a capacitor structure and capacitor structure

#4 | 2017-10-26
US20170309628A1
Electricity

FinFET device with enlarged channel regions

#5 | 2017-08-31
US20170250181A1
Electricity

FinFET device with enlarged channel regions

#6 | 2017-05-25
US20170148850A1
Electricity

Memory device structure

#7 | 2017-04-27
US20170117322A1
Electricity

Method of forming a memory device structure and memory device structure

#8 | 2017-03-09
US20170069550A1
Electricity

Method of forming a semiconductor device with STI structures on an SOI substrate

#9 | 2016-10-13
US20160300947A1
Electricity

Complex semiconductor devices of the SOI type

#10 | 2016-07-14
US20160204038A1
Electricity

Methods for fabricating integrated circuits with improved implantation processes

#11 | 2016-04-26
US14613425
Electricity

Method of forming a semiconductor device and resulting semiconductor devices

#12 | 2016-04-07
US20160099336A1
Electricity

OPC enlarged dummy electrode to eliminate ski slope at eSiGe

#13 | 2015-10-08
US20150287782A1
Electricity

Integrated circuits and methods of fabrication thereof

#14 | 2015-10-08
US20150287646A1
Electricity

Methods for fabricating integrated circuits with improved implantation processes

#15 | 2015-08-27
US20150243787A1
Electricity

Method for a uniform compressive strain layer and device thereof

#16 | 2015-07-02
US20150187909A1
Electricity

METHODS FOR FABRICATING MULTIPLE-GATE INTEGRATED CIRCUITS

#17 | 2015-06-11
US20150162439A1
Electricity

SEMICONDUCTOR DEVICE INCLUDING A TRANSISTOR HAVING A LOW DOPED DRIFT REGION AND METHOD FOR THE FORMATION THEREOF

#18 | 2015-05-28
US20150145000A1
Electricity

Integrated circuits with shallow trench isolations, and methods for producing the same

#19 | 2015-03-19
US20150076618A1
Electricity

INTEGRATED CIRCUITS WITH A CORRUGATED GATE, AND METHODS FOR PRODUCING THE SAME

#20 | 2015-01-22
US20150021703A1
Electricity

Gate oxide quality for complex MOSFET devices

#21 | 2015-01-15
US20150014777A1
Electricity

Channel semiconductor alloy layer growth adjusted by impurity ion implantation

#22 | 2014-12-11
US20140361385A1
Electricity

Method of forming a semiconductor device structure employing fluorine doping and according semiconductor device structure

#23 | 2014-12-04
US20140357028A1
Electricity

Methods for fabricating integrated circuits with the implantation of fluorine

#24 | 2014-11-20
US20140342514A1
Electricity

Methods for fabricating integrated circuits with the implantation of nitrogen

#25 | 2014-09-18
US20140264626A1
Electricity

METHOD FOR FORMING A GATE ELECTRODE OF A SEMICONDUCTOR DEVICE, GATE ELECTRODE STRUCTURE FOR A SEMICONDUCTOR DEVICE AND ACCORDING SEMICONDUCTOR DEVICE STRUCTURE

#26 | 2014-09-18
US20140264484A1
Electricity

FLUORINE-DOPED CHANNEL SILICON-GERMANIUM LAYER

#27 | 2014-09-18
US20140264347A1
Electricity

Transistor with embedded strain-inducing material formed in cavities based on an amorphization process and a heat treatment

#28 | 2014-09-11
US20140256097A1
Electricity

METHODS FOR FORMING INTEGRATED CIRCUIT SYSTEMS EMPLOYING FLUORINE DOPING

#29 | 2014-07-17
US20140197498A1
Electricity

Integrated circuits and methods for fabricating integrated circuits with improved silicide contacts

#30 | 2014-04-17
US20140103449A1
Electricity

OXYGEN FREE RTA ON GATE FIRST HKMG STACKS

InventorID:

724404 ⎘