Inventor profile of:

Roden Topacio

City:

Markham

Country:

Canada

Published Applications:

17

Last publication date:

2023-05-18

Top Assignees for applications by Roden Topacio

The entities that hold a legal rights for patent applications filed by inventor Topacio Roden:

Recent patent applications by Topacio Roden

Roden Topacio from Markham, CA has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-05-18
US20230154834A1
Electricity

Semiconductor package assembly using a passive device as a standoff

#2 | 2016-05-05
US20160126171A1
Electricity

Circuit board with constrained solder interconnect pads

#3 | 2014-06-19
US20140167261A1
Electricity

Routing layer for mitigating stress in a semiconductor die

#4 | 2014-04-24
US20140110837A1
Electricity

Routing layer for mitigating stress in a semiconductor die

#5 | 2013-12-26
US20130343000A1
Electricity

Thermal management circuit board for stacked semiconductor chip device

#6 | 2013-06-20
US20130154122A1
Electricity

Semiconductor chip with underfill anchors

#7 | 2013-03-21
US20130069250A1
Electricity

Die substrate with reinforcement structure

#8 | 2013-02-07
US20130032941A1
Electricity

Routing layer for mitigating stress in a semiconductor die

#9 | 2012-10-25
US20120270388A1
Electricity

Routing layer for mitigating stress in a semiconductor die

#10 | 2011-10-20
US20110254154A1
Electricity

Routing layer for mitigating stress in a semiconductor die

#11 | 2011-09-22
US20110225813A1
Electricity

Method of manufacturing substrates having asymmetric buildup layers

#12 | 2011-05-05
US20110100692A1
Electricity

Circuit Board with Variable Topography Solder Interconnects

#13 | 2011-04-28
US20110095415A1
Electricity

Routing layer for mitigating stress in a semiconductor die

#14 | 2011-02-03
US20110024898A1
Electricity

METHOD OF MANUFACTURING SUBSTRATES HAVING ASYMMETRIC BUILDUP LAYERS

#15 | 2009-09-24
US20090236730A1
Electricity

Die substrate with reinforcement structure

#16 | 2008-05-01
US20080099910A1
Electricity

Flip-Chip Semiconductor Package with Encapsulant Retaining Structure and Strip

#17 | 2008-03-06
US20080057625A1
Electricity

Method and apparatus for making semiconductor packages

InventorID:

74923 ⎘