Mountain View, California
United States
22
2025-09-25
The entities that hold a legal rights for patent applications filed by inventor Hutton Michael David:
Michael David Hutton from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Large-Scale Accelerator System Energy Performance Optimization
#2 | 2025-03-27Dynamic Power-Aware Workload Scheduler
#3 | 2023-04-20Large-Scale Accelerator System Energy Performance Optimization
#4 | 2022-07-14PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED NETWORK-ON-CHIP
#5 | 2022-01-13Thermal management of integrated circuits
#6 | 2020-04-30Programmable Circuit Having Multiple Sectors
#7 | 2019-07-11PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED NETWORK-ON-CHIP
#8 | 2019-03-28Systems and methods for region-based error detection and management in integrated circuits
#9 | 2019-02-07Thermal management of integrated circuits
#10 | 2018-08-23Prioritized error-detection and scheduling
#11 | 2017-11-02Method and apparatus for implementing a system-level design tool for design planning and architecture exploration
#12 | 2017-02-21Integrated circuits with error handling capabilities
#13 | 2017-02-16Method and apparatus for implementing a system-level design tool for design planning and architecture exploration
#14 | 2017-02-09Programmable logic device with integrated network-on-chip
#15 | 2016-12-29Methods and apparatus for embedding an error correction code in storage circuits
#16 | 2016-10-25Configurable storage blocks with embedded first-in first-out and last-in first-out circuitry
#17 | 2016-10-06Methods and apparatus for embedding an error correction code in memory cells
#18 | 2016-02-18Programmable circuit having multiple sectors
#19 | 2016-01-05Integrated circuits with interconnect selection circuitry
#20 | 2015-08-11Programmable interposer circuitry
#21 | 2014-12-25Method and apparatus for implementing a system-level design tool for design planning and architecture exploration
#22 | 2014-05-08Programmable logic device with integrated network-on-chip
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