Inventor profile of:

Michael David Hutton

City:

Mountain View, California

Country:

United States

Published Applications:

22

Last publication date:

2025-09-25

Top Assignees for applications by Michael David Hutton

The entities that hold a legal rights for patent applications filed by inventor Hutton Michael David:

Recent patent applications by Hutton Michael David

Michael David Hutton from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-09-25
US20250298431A1
Physics

Large-Scale Accelerator System Energy Performance Optimization

#2 | 2025-03-27
US20250103128A1
Physics

Dynamic Power-Aware Workload Scheduler

#3 | 2023-04-20
US20230119235A1
Physics

Large-Scale Accelerator System Energy Performance Optimization

#4 | 2022-07-14
US20220224656A1
Electricity

PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED NETWORK-ON-CHIP

#5 | 2022-01-13
US20220011838A1
Physics

Thermal management of integrated circuits

#6 | 2020-04-30
US20200136624A1
Electricity

Programmable Circuit Having Multiple Sectors

#7 | 2019-07-11
US20190215280A1
Electricity

PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED NETWORK-ON-CHIP

#8 | 2019-03-28
US20190095570A1
Physics

Systems and methods for region-based error detection and management in integrated circuits

#9 | 2019-02-07
US20190043737A1
Electricity

Thermal management of integrated circuits

#10 | 2018-08-23
US20180239665A1
Physics

Prioritized error-detection and scheduling

#11 | 2017-11-02
US20170316120A1
Physics

Method and apparatus for implementing a system-level design tool for design planning and architecture exploration

#12 | 2017-02-21
US14333408
Physics

Integrated circuits with error handling capabilities

#13 | 2017-02-16
US20170046455A1
Physics

Method and apparatus for implementing a system-level design tool for design planning and architecture exploration

#14 | 2017-02-09
US20170041249A1
Electricity

Programmable logic device with integrated network-on-chip

#15 | 2016-12-29
US20160378599A1
Physics

Methods and apparatus for embedding an error correction code in storage circuits

#16 | 2016-10-25
US14245306
Physics

Configurable storage blocks with embedded first-in first-out and last-in first-out circuitry

#17 | 2016-10-06
US20160294413A1
Electricity

Methods and apparatus for embedding an error correction code in memory cells

#18 | 2016-02-18
US20160049941A1
Electricity

Programmable circuit having multiple sectors

#19 | 2016-01-05
US14502466
Physics

Integrated circuits with interconnect selection circuitry

#20 | 2015-08-11
US13829965
Electricity

Programmable interposer circuitry

#21 | 2014-12-25
US20140379307A1
Physics

Method and apparatus for implementing a system-level design tool for design planning and architecture exploration

#22 | 2014-05-08
US20140126572A1
Electricity

Programmable logic device with integrated network-on-chip

InventorID:

752751 ⎘