Pendleton, Oregon
United States
112
2025-11-13
The entities that hold a legal rights for patent applications filed by inventor Norman Robert:
Robert Norman from Pendleton, US has applied for patents for these inventions. The list has both pending applications and granted patents:
DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY
#2 | 2024-10-31DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY USING WAFER BONDING
#3 | 2023-08-17Device with embedded high-bandwidth, high-capacity memory using wafer bonding
#4 | 2021-12-23Memory device including modular memory units and modular circuit units for concurrent memory operations
#5 | 2020-07-30Device with embedded high-bandwidth, high-capacity memory using wafer bonding
#6 | 2020-04-16Preservation circuit and methods to maintain values representing data in one or more layers of memory
#7 | 2018-06-28Preservation circuit and methods to maintain values representing data in one or more layers of memory
#8 | 2018-01-18BUFFERING SYSTEMS FOR ACCESSING MULTIPLE LAYERS OF MEMORY IN INTEGRATED CIRCUITS
#9 | 2018-01-18BUFFERING SYSTEMS FOR ACCESSING MULTIPLE LAYERS OF MEMORY IN INTEGRATED CIRCUITS
#10 | 2017-06-08Preservation circuit and methods to maintain values representing data in one or more layers of memory
#11 | 2016-12-29Buffering systems for accessing multiple layers of memory in integrated circuits
#12 | 2016-04-21METHOD FOR READING A THIRD-DIMENSIONAL EMBEDDED RE-WRITEABLE NON-VOLATILE MEMORY AND REGISTERS
#13 | 2015-09-24METHOD FOR READING A THIRD-DIMENSIONAL EMBEDDED RE-WRITEABLE NON-VOLATILE MEMORY AND REGISTERS
#14 | 2015-09-17Preservation circuit and methods to maintain values representing data in one or more layers of memory
#15 | 2015-08-06Buffering systems for accessing multiple layers of memory in integrated circuits
#16 | 2014-07-17Buffering systems for accessing multiple layers of memory in integrated circuits
#17 | 2014-05-22Preservation circuit and methods to maintain values representing data in one or more layers of memory
#18 | 2014-05-22Programmable logic device structure using third dimensional memory
#19 | 2012-10-18INTEGRATED CIRCUITS TO CONTROL ACCESS TO MULTIPLE LAYERS OF MEMORY IN A SOLID STATE DRIVE
#20 | 2012-10-11METHOD FOR INDICATING A NON-FLASH NONVOLATILE MULTIPLE-TYPE THREE-DIMENSIONAL MEMORY
#21 | 2012-08-30Digital Potentiometer Using Third Dimensional Memory
#22 | 2012-08-23Memory Emulation In An Image Capture Device
#23 | 2012-08-16Securing Non Volatile Data In RRAM
#24 | 2012-08-16INTEGRATED CIRCUIT WITH COMPRESS ENGINE
#25 | 2012-08-16Memory Emulation In A Cellular Telephone
#26 | 2012-08-16Buffering systems for accessing multiple layers of memory in integrated circuits
#27 | 2012-07-12System For Accessing Non-Volatile Memory
#28 | 2012-07-12Combined memories in integrated circuits
#29 | 2012-06-14Buffering Systems For Accessing Multiple Layers Of Memory In Integrated Circuits
#30 | 2012-06-14Preservation Circuit And Methods To Maintain Values Representing Data In One Or More Layers Of Memory
#31 | 2012-03-22Memory device with vertically embedded non flash non volatile memory for emulation of NAND flash memory
#32 | 2012-03-22Integrated circuits using non volatile resistivity sensitive memory for emulation of embedded flash memory
#33 | 2012-03-22System including vertically stacked embedded non-flash re-writable non-volatile memory
#34 | 2012-03-15Method for indicating a non-flash nonvolatile multiple-type three-dimensional memory
#35 | 2012-03-15Dual ported non volatile FIFO with third dimension memory
#36 | 2012-03-15Performing Data Operations Using Non Volatile Third Dimension Memory
#37 | 2012-03-08Securing non volatile data in an embedded memory device
#38 | 2012-01-26System for accessing non volatile memory
#39 | 2011-12-22Combined memories in integrated circuits
#40 | 2011-12-15Programmable logic device structure using third dimensional memory
#41 | 2011-11-17Write buffering systems for accessing multiple layers of memory in integrated circuits
#42 | 2011-10-06Integrated circuits to control access to multiple layers of memory in a solid state drive
#43 | 2011-10-06Buffering systems for accessing multiple layers of memory in integrated circuits
#44 | 2011-10-06Method for reading a third-dimensional embedded re-writeable non-volatile memory and registers
#45 | 2011-08-04Preservation circuit and methods to maintain values representing data in one or more layers of memory
#46 | 2011-07-28Memory device with vertically embedded non-flash non-volatile memory for emulation of NAND flash memory
#47 | 2011-07-14Securing non-volatile data in an embedded memory device
#48 | 2011-07-07Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory
#49 | 2011-07-07Field programmable gate arrays using resistivity-sensitive memories
#50 | 2011-06-16Read buffering systems for accessing multiple layers of memory in integrated circuits
#51 | 2011-06-14Processor including vertically stacked third-dimensional embedded re-writeable non-volatile memory and registers
#52 | 2011-06-09Method for accessing vertically stacked embedded non-flash re-writable non-volatile memory
#53 | 2011-05-26System for accessing non-volatile memory
#54 | 2011-05-19Memory emulation using resistivity-sensitive memory
#55 | 2011-05-05Performing data operations using non-volatile third dimension memory
#56 | 2011-03-17State machines using non-volatile re-writeable two-terminal resistivity-sensitive memories
#57 | 2011-02-24Memory device with vertically embedded non-flash non-volatile memory for emulation of NAND flash memory
#58 | 2011-02-17Securing non-volatile data in an embedded memory device
#59 | 2011-02-10ASIC including vertically stacked embedded non-flash re-writable non-volatile memory
#60 | 2011-02-03System using non-volatile resistivity-sensitive memory for emulation of embedded flash memory
#61 | 2011-01-13Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory
#62 | 2010-11-18Fast data access through page manipulation
#63 | 2010-11-04Media player with non-volatile memory
#64 | 2010-10-28Performing data operations using non-volatile third dimension memory
#65 | 2010-10-14Preservation circuit and methods to maintain values representing data in one or more layers of memory
#66 | 2010-09-23Three-dimensional non-volatile register with an oxygen-ion-based memory element and a vertically-stacked register logic
#67 | 2010-09-16Columnar replacement of defective memory cells
#68 | 2010-09-02Circuitry and method for indicating a memory
#69 | 2010-09-02Non-volatile FIFO with third dimension memory
#70 | 2010-08-05Multiple layers of memory implemented as different memory technology
#71 | 2010-08-05Non-volatile dual port third dimensional memory
#72 | 2010-06-24Memory scrubbing in third dimension memory
#73 | 2010-06-24Protecting integrity of data in multi-layered memory with data redundancy
#74 | 2010-06-24Third dimensional memory with compress engine
#75 | 2010-06-24Multi-structured memory
#76 | 2010-06-24Digital potentiometer using third dimensional memory
#77 | 2010-06-24Configurable memory interface to provide serial and parallel access to memories
#78 | 2010-06-10Buffering systems for accessing multiple layers of memory in integrated circuits
#79 | 2010-06-03Field programmable gate arrays using resistivity sensitive memories
#80 | 2010-06-03Programmable logic device structure using third dimensional memory
#81 | 2010-02-04Preservation circuit and methods to maintain values representing data in one or more layers of memory
#82 | 2010-01-14Memory emulation using resistivity-sensitive memory
#83 | 2009-09-24Scaleable memory systems using third dimension memory
#84 | 2009-08-13Integrated circuits and methods to control access to multiple layers of memory
#85 | 2009-08-06Serial memory interface
#86 | 2009-08-06Integrated circuits to control access to multiple layers of memory in a solid state drive
#87 | 2009-08-06Non-volatile register having a memory element and register logic vertically configured on a substrate
#88 | 2009-08-06Integrated circuits to control access to multiple layers of memory
#89 | 2009-07-16Securing data in memory device
#90 | 2009-07-09Buffering systems methods for accessing multiple layers of memory in integrated circuits
#91 | 2009-07-09Buffering systems for accessing multiple layers of memory in integrated circuits
#92 | 2009-07-09Programmable logic device structure using third dimensional memory
#93 | 2009-07-02Non-volatile processor register
#94 | 2009-07-02Memory Sanitization
#95 | 2009-07-02Non-Volatile memories in interactive entertainment systems
#96 | 2009-07-02Radio frequency identification transponder memory
#97 | 2009-07-02State machines using resistivity-sensitive memories
#98 | 2009-07-02Field programmable gate arrays using resistivity sensitive memories
#99 | 2009-06-25Memory access protection
#100 | 2009-06-25Method and system for accessing non-volatile memory
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