Grenoble
France
47
2025-01-30
The entities that hold a legal rights for patent applications filed by inventor POSSEME Nicolas:
Nicolas POSSEME from Grenoble, FR has applied for patents for these inventions. The list has both pending applications and granted patents:
METHOD OF MANUFACTURING AN ELECTRONIC COMPONENT
#2 | 2024-10-10METHOD FOR MAKING AN ELECTRONIC DEVICE WITH SUPERCONDUCTOR QUBIT(S) INCLUDING AT LEAST ONE JOFET
#3 | 2024-10-03Method for manufacturing a mould for nanoprinting and associated mould
#4 | 2023-10-12METHOD FOR PRODUCING A LAYER ON ONLY CERTAIN SURFACES OF A STRUCTURE
#5 | 2023-06-29METHOD FOR ACTIVATING AN EXPOSED LAYER
#6 | 2023-06-15METHOD FOR MAKING A QUANTUM DEVICE
#7 | 2023-04-20DEVICE COMPRISING SPACERS INCLUDING A LOCALISED AIRGAP AND ASSOCIATED MANUFACTURING METHODS
#8 | 2022-11-03Method of forming the spacers of a transistor gate
#9 | 2022-11-03PROCESS FOR HYBRID SURFACE STRUCTURING BY PLASMA ETCHING
#10 | 2022-08-25METHOD OF ENGRAVING A THREE-DIMENSIONAL DIELECTRIC LAYER
#11 | 2022-08-25METHOD FOR ETCHING A THREE-DIMENSIONAL DIELECTRIC LAYER
#12 | 2022-08-25Method of forming the spacers on lateral flanks of a transistor gate using successive implantation phases
#13 | 2022-07-21SEMICONDUCTOR DEVICE AND ASSOCIATED MANUFACTURING METHOD
#14 | 2022-06-02QUANTUM DEVICE AND METHOD FOR PRODUCING THE SAME
#15 | 2022-06-02Method for increasing the surface roughness of a metal layer
#16 | 2022-06-02Method for increasing the surface roughness of a metal layer
#17 | 2022-06-02Method of making a quantum device
#18 | 2022-03-03Method of manufacturing microelectronic components
#19 | 2022-01-27Method of making an individualization zone of an integrated circuit
#20 | 2021-03-25Method of etching a layer based on a III-V material
#21 | 2021-03-04Method for producing a component by filling a cavity within an electrical isolation area with carbon-based material
#22 | 2021-02-25Method for manufacturing microelectronic components
#23 | 2021-01-14Method for forming trenches
#24 | 2021-01-14Method for forming spacers of a transistor
#25 | 2021-01-07Method for producing at least one device in compressive strained semiconductor
#26 | 2020-08-06Method for etching a three-dimensional dielectric layer
#27 | 2020-08-06Method of manufacturing a transistor with a raised source and drain
#28 | 2020-07-16Method of etching a dielectric layer
#29 | 2020-07-02Method of producing microelectronic components
#30 | 2020-06-25Method for fabricating an integrated circuit including a NMOS transistor and a PMOS transistor
#31 | 2020-06-11Method for manufacturing an electronic component having multiple quantum dots
#32 | 2016-10-13Method for forming spacers for a transistor gate
#33 | 2016-09-01Selective etching process of a mask disposed on a silicon substrate
#34 | 2016-08-18Protection method for protecting a silicide layer
#35 | 2016-06-23METHOD FOR MAKING AN INTEGRATED CIRCUIT IN THREE DIMENSIONS
#36 | 2016-03-17Method for the surface etching of a three-dimensional structure
#37 | 2016-03-17Production of spacers at flanks of a transistor gate
#38 | 2016-02-04Microelectronic method for etching a layer
#39 | 2016-01-21METHOD OF FORMING SPACERS FOR A GATE OF A TRANSISTOR
#40 | 2016-01-21Method of forming contact openings for a transistor
#41 | 2015-09-24Method of etching a porous dielectric material
#42 | 2015-08-13Plasma etching process
#43 | 2015-06-11Method for forming spacers for a transistor gate
#44 | 2014-07-03Method for isotropic etching
#45 | 2014-07-03METHOD FOR FORMING SPACERS FOR A TRANSITOR GATE
#46 | 2014-07-03Method of etching a porous dielectric material
#47 | 2014-07-03Method of obtaining patters in an antireflective layer
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