Su Wei Lim

System and method for power management

Systems, apparatuses, and methods for synchronizing port entry into a low power status

Dual bus standard switching bus controller

Architected protocol for changing link operating mode

Method, apparatus and system for single-ended communication of transaction layer packets

Link equalization mechanism

Device, method and system for operation of a low power PHY with a PCIe protocol stack

Techniques for inter-component communication based on a state of a chip select pin

Inter-component communication including posted and non-posted transactions

Inter-component communication including slave component initiated transaction

Inter-component communication including posted and non-posted transactions

Inter-component communication using an interface including master and slave communication

Systems, apparatuses, and methods for handling timeouts

Systems, apparatuses, and methods for synchronizing port entry into a low power state

Apparatus for multiple bus master engines to share the same request channel to a pipelined backbone

Processor hiding its power-up latency with activation of a root port and quickly sending a downstream cycle

System and method for power management

Dual bus standard switching bus controller

Architected protocol for changing link operating mode

Architected protocol for changing link operating mode

Method and apparatus for clock frequency ratio independent error logging

Method and apparatus for agent interfacing with pipeline backbone to locally handle transactions while obeying ordering rule

Method, apparatus, and system to handle transactions received after a configuration change request

Apparatuses for inter-component communication including slave component initiated transaction

Controllable transaction synchronization for merging peripheral devices

Power mangement techniques for an input/output (I/O) subsystem

Dual bus standard switching bus controller

PCI to PCI express protocol conversion