Inventor profile of:

Jan Proschwitz

City:

Riesa

Country:

Germany

Published Applications:

17

Last publication date:

2025-06-26

Top Assignees for applications by Jan Proschwitz

The entities that hold a legal rights for patent applications filed by inventor Proschwitz Jan:

Recent patent applications by Proschwitz Jan

Jan Proschwitz from Riesa, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-06-26
US20250210456A1
Electricity

Active Cooling for Heterogenous Packages

#2 | 2025-06-19
US20250201761A1
Electricity

SELF-ALIGNING SEMICONDUCTOR CONSTRUCTION

#3 | 2025-04-03
US20250112206A1
Electricity

DIE PLACEMENT WITHIN A FORMED CAVITY ON A REDISTRIBUTION LAYER

#4 | 2023-10-05
US20230317681A1
Electricity

THREE-DIMENSIONAL STACK COOLING WINGS

#5 | 2023-10-05
US20230317562A1
Electricity

DUAL-SIDED TERMINAL DEVICE WITH SPLIT SIGNAL AND POWER ROUTING

#6 | 2023-10-05
US20230317551A1
Electricity

HETEROGENEOUS PACKAGES HAVING THERMAL TOWERS

#7 | 2023-09-28
US20230307300A1
Electricity

PACKAGE LAYERS FOR STRESS MONITORING AND METHOD

#8 | 2022-09-08
US20220285898A1
Electricity

Snap button fastener providing electrical connection

#9 | 2021-09-30
US20210305158A1
Electricity

WLCSP reliability improvement for package edges including package shielding

#10 | 2021-02-11
US20210044065A1
Electricity

Snap button fastener providing electrical connection

#11 | 2019-12-26
US20190393659A1
Electricity

Snap button fastener providing electrical connection

#12 | 2018-08-02
US20180218962A1
Electricity

Low thermal resistance hanging die package

#13 | 2018-05-31
US20180150156A1
Physics

WEARABLE COMPUTING DEVICE

#14 | 2017-08-24
US20170244208A1
Electricity

Snap button fastener providing electrical connection

#15 | 2016-08-04
US20160224148A1
Physics

Wearable computing device

#16 | 2016-06-23
US20160181729A1
Electricity

Snap button fastener providing electrical connection

#17 | 2014-07-17
US20140197530A1
Electricity

Semiconductor device with chip having low-k-layers

InventorID:

836952 ⎘