Inventor profile of:

Patrick Koeberl

City:

Alsbach-Haenlein

Country:

Germany

Published Applications:

27

Last publication date:

2024-01-11

Top Assignees for applications by Patrick Koeberl

The entities that hold a legal rights for patent applications filed by inventor Koeberl Patrick:

Recent patent applications by Koeberl Patrick

Patrick Koeberl from Alsbach-Haenlein, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-01-11
US20240012951A1
Physics

Providing a partial reconfiguration (PR) bitstream to a cloud service provider for PR configuration of an accelerator device

#2 | 2023-12-21
US20230409762A1
Physics

Broadcast remote sealing for scalable trusted execution environment provisioning

#3 | 2023-11-16
US20230367916A1
Physics

ENABLING LATE-BINDING OF SECURITY FEATURES VIA CONFIGURATION SECURITY CONTROLLER FOR ACCELERATOR DEVICES

#4 | 2023-09-21
US20230297727A1
Physics

ENABLING SECURE STATE-CLEAN DURING CONFIGURATION OF PARTIAL RECONFIGURATION BITSTREAMS ON FPGA

#5 | 2023-03-23
US20230089869A1
Physics

SCALABLE RUNTIME VALIDATION FOR ON-DEVICE DESIGN RULE CHECKS

#6 | 2023-03-02
US20230068607A1
Physics

Transparent network access control for spatial accelerator device multi-tenancy

#7 | 2022-07-14
US20220222202A1
Physics

Broadcast remote sealing for scalable trusted execution environment provisioning

#8 | 2021-05-20
US20210150033A1
Physics

Enabling late-binding of security features via configuration security controller for accelerator devices

#9 | 2021-04-22
US20210117268A1
Physics

RUNTIME FAULT DETECTION, FAULT LOCATION, AND CIRCUIT RECOVERY IN AN ACCELERATOR DEVICE

#10 | 2021-04-15
US20210112073A1
Electricity

Broadcast remote sealing for scalable trusted execution environment provisioning

#11 | 2021-04-15
US20210110099A1
Physics

Scalable runtime validation for on-device design rule checks

#12 | 2021-04-15
US20210110069A1
Physics

Enabling secure state-clean during configuration of partial reconfiguration bitstreams on FPGA

#13 | 2021-04-15
US20210110065A1
Physics

Enabling secure communication via attestation of multi-tenant configuration on accelerator devices

#14 | 2021-04-15
US20210109889A1
Physics

Transparent network access control for spatial accelerator device multi-tenancy

#15 | 2018-10-04
US20180285291A1
Physics

Context-sensitive interrupts

#16 | 2018-06-21
US20180173644A1
Physics

Lightweight trusted tasks

#17 | 2018-06-07
US20180157603A1
Physics

Dynamic configuration and peripheral access in a processor

#18 | 2018-03-29
US20180089433A1
Physics

Photon emission attack resistance driver circuits

#19 | 2017-06-29
US20170187752A1
Electricity

Remote attestation and enforcement of hardware security policy

#20 | 2016-12-29
US20160379207A1
Physics

SECURED CREDENTIAL AGGREGATOR

#21 | 2016-10-20
US20160306752A1
Physics

Execution-aware memory protection

#22 | 2016-03-24
US20160087805A1
Electricity

Post-processing mechanism for physically unclonable functions

#23 | 2015-07-02
US20150188717A1
Electricity

PHYSICALLY UNCLONABLE FUNCTION REDUNDANT BITS

#24 | 2015-06-25
US20150178143A1
Physics

Using dark bits to reduce physical unclonable function (PUF) error rate without storing dark bits location

#25 | 2015-04-02
US20150092939A1
Electricity

Dark bits to reduce physically unclonable function error rates

#26 | 2015-01-29
US20150032996A1
Physics

Execution-aware memory protection

#27 | 2014-08-07
US20140218067A1
Electricity

Grouping of physically unclonable functions

InventorID:

860305 ⎘