Dresden
Germany
37
2019-04-25
The entities that hold a legal rights for patent applications filed by inventor Moll Hans-Peter:
Hans-Peter Moll from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
Semiconductor device including a leveling dielectric fill material
#2 | 2019-02-07Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode lines
#3 | 2017-11-02FDSOI-capacitor
#4 | 2017-06-08TRENCH BASED CHARGE PUMP DEVICE
#5 | 2017-05-11Test structures and method of forming an according test structure
#6 | 2017-03-09Detection of gate-to-source/drain shorts
#7 | 2017-03-02ELECTRICAL GATE-TO-SOURCE/DRAIN CONNECTION
#8 | 2016-11-24E-fuse in SOI configuration
#9 | 2016-10-27Method of manufacturing P-channel FET device with SiGe channel
#10 | 2016-10-20Integrated circuit product with bulk and SOI semiconductor devices
#11 | 2016-10-13Semiconductor device with thin-film resistor
#12 | 2016-09-15Fully depleted device with buried insulating layer in channel region
#13 | 2016-09-08METHODS OF FORMING A MASKING PATTERN AND A SEMICONDUCTOR DEVICE STRUCTURE
#14 | 2016-08-25Semiconductor structure including at least one electrically conductive pillar, semiconductor structure including a contact contacting an outer layer of an electrically conductive structure and method for the formation thereof
#15 | 2016-08-23Compact FDSOI device with Bulex contact extending through buried insulating layer adjacent gate structure for back-bias
#16 | 2016-07-14FDSOI—capacitor
#17 | 2016-07-14Cointegration of bulk and SOI semiconductor devices
#18 | 2016-04-28FD devices in advanced semiconductor techniques
#19 | 2016-03-03Embedded capacitor
#20 | 2015-12-10INTEGRATED CIRCUITS WITH VERTICAL JUNCTIONS BETWEEN nFETS AND pFETS, AND METHODS OF MANUFACTURING THE SAME
#21 | 2015-03-26Integrated circuits with protected resistors and methods for fabricating the same
#22 | 2015-03-05Top corner rounding by implant-enhanced wet etching
#23 | 2014-09-04Methods of forming asymmetric spacers on various structures on integrated circuit products
#24 | 2010-04-15Single-Sided Trench Contact Window
#25 | 2010-04-15Interconnect structure for semiconductor devices
#26 | 2009-02-12INTEGRATED DEVICE
#27 | 2008-02-21Method of forming a semiconductor device
#28 | 2007-04-05Method for producing a trench transistor and trench transistor
#29 | 2007-03-08METHOD FOR PRODUCING A STRUCTURE WITH A LOW ASPECT RATIO
#30 | 2006-10-24Method for fabricating a self-aligning mask
#31 | 2006-05-02Process for producing an etching mask on a microstructure, in particular a semiconductor structure with trench capacitors, and corresponding use of the etching mask
#32 | 2005-11-15Method for fabricating a semiconductor structure
#33 | 2005-10-13Method for masking a recess in a structure having a high aspect ratio
#34 | 2005-08-23Semiconductor substrate with trenches of varying depth
#35 | 2005-08-02Method for fabricating an integrated semiconductor component
#36 | 2005-07-12Method for fabricating a trench capacitor with an insulation collar
#37 | 2005-05-05Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage capacitor
896239 ⎘