Sundar NARAYANAN

INTERACTIVE DATA LABELING FOR SUBSTRATE GENERATION PROCESSES

SUBSTRATE PROCESS OPERATION ANALYSIS APPLICATION AND GENERATION OF VISUALIZATIONS

DETERMINING SUBSTRATE CHARACTERISTICS BY VIRTUAL SUBSTRATE MEASUREMENT

GENERATION AND UTILIZATION OF VIRTUAL FEATURES FOR PROCESS MODELING

Resistive switching memory having confined filament formation and methods thereof

VARYING NITROGEN CONTENT IN SWITCHING LAYER OF TWO-TERMINAL RESISTIVE SWITCHING DEVICES

Resistive switching memory devices and method(s) for forming the resistive switching memory devices

Using aluminum as etch stop layer

Memory stack liner comprising dielectric block layer material

Resistive random access memory and fabrication techniques

Flatness of memory cell surfaces

Liner layer for dielectric block layer

Using aluminum as etch stop layer

Monolithically integrated resistive memory using integrated-circuit foundry compatible processes

Monolithic memory comprising 1T1R code memory and 1TnR storage class memory

Regulating interface layer formation for two-terminal memory

Resistive random access memory (RRAM) cell and method for forming the RRAM cell

Recessed high voltage metal oxide semiconductor transistor for RRAM cell

Mitigating damage from a chemical mechanical planarization process

Method for surface roughness reduction after silicon germanium thin film deposition

Integrative resistive memory in backend metal layers

Monolithically integrated resistive memory using integrated-circuit foundry compatible processes

Scalable silicon based resistive memory device

Regulating interface layer growth with NO for two-terminal memory