San Jose, California
United States
68
2016-05-26
The entities that hold a legal rights for patent applications filed by inventor Phatak Prashant B.:
Prashant B. Phatak from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Using Metal Silicides as Electrodes for MSM Stack in Selector for Non-Volatile Memory Application
#2 | 2016-05-26Diamond like carbon (DLC) as a thermal sink in a selector stack for non-volatile memory application
#3 | 2016-05-26Simultaneous Carbon and Nitrogen Doping of Si in MSM Stack as a Selector Device for Non-Volatile Memory Application
#4 | 2016-05-19Diamond Like Carbon (DLC) in a Semiconductor Stack as a Selector for Non-Volatile Memory Application
#5 | 2016-05-12DRAM MIMCAP Stack with MoO2 Electrode
#6 | 2016-04-28Photo-induced MSM stack
#7 | 2016-04-07Doped electrode for DRAM capacitor stack
#8 | 2016-03-31Method to Improve DRAM Performance
#9 | 2016-01-26Tunneling barrier creation in MSM stack as a selector device for non-volatile memory application
#10 | 2015-09-10Non-volatile resistive-switching memories
#11 | 2015-06-25ZrOx/STO/ZrOx Based Selector Element
#12 | 2015-06-25TiOx based selector element
#13 | 2015-05-28Resistive-switching memory element
#14 | 2015-05-21Selector device using low leakage dielectric MIMCAP diode
#15 | 2015-05-21Using multi-layer MIMCAPs with defective barrier layers as selector element for a cross bar memory array
#16 | 2015-05-21Reduction of forming voltage in semiconductor devices
#17 | 2015-05-21Mimcaps with quantum wells as selector elements for crossbar memory arrays
#18 | 2015-04-09Non-volatile resistive-switching memories
#19 | 2015-03-17Carbon-doped silicon based selector element
#20 | 2015-03-10Silicon based selector element
#21 | 2015-01-08Methods for forming templated materials
#22 | 2015-01-01Method of forming an asymmetric MIMCAP or a Schottky device as a selector element for a cross-bar memory array
#23 | 2014-12-11ALD processing techniques for forming non-volatile resistive switching memories
#24 | 2014-10-30Surface treatment to improve resistive-switching characteristics
#25 | 2014-10-09Method for reducing forming voltage in resistive random access memory
#26 | 2014-09-18Atomic Layer Deposition of Reduced-Leakage Post-Transition Metal Oxide Films
#27 | 2014-09-18Current selector for non-volatile memory in a cross bar array based on defect and band engineering metal-dielectric-metal stacks
#28 | 2014-09-18ZnTe on TiN or Pt electodes with a portion operable as a current limiting layer for ReRAM applications
#29 | 2014-09-18Using multi-layer MIMCAPs in the tunneling regime as selector element for a cross-bar memory array
#30 | 2014-09-11Nonvolatile memory elements
#31 | 2014-09-04Bipolar resistive-switching memory with a single diode per memory cell
#32 | 2014-07-03Current selector for non-volatile memory in a cross bar array based on defect and band engineering metal-dielectric-metal stacks
#33 | 2014-06-26Methods for forming templated materials
#34 | 2014-06-26Method of forming an asymmetric MIMCAP or a schottky device as a selector element for a cross-bar memory array
#35 | 2014-06-05Selector device using low leakage dielectric MIMCAP diode
#36 | 2014-05-22Dielectric doping using high productivity combinatorial methods
#37 | 2014-05-22Controlled localized defect paths for resistive memories
#38 | 2014-04-03Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate
#39 | 2014-03-27ALD processing techniques for forming non-volatile resistive switching memories
#40 | 2014-02-20Nonvolatile memory elements
#41 | 2014-02-06Non-volatile resistive-switching memories
#42 | 2014-01-16Resistive-switching memory element
#43 | 2014-01-02Reduction of forming voltage in semiconductor devices
#44 | 2014-01-02Surface treatment to improve resistive-switching characteristics
#45 | 2013-11-28Bipolar resistive-switching memory with a single diode per memory cell
#46 | 2013-11-07Resistive switching memory element including doped silicon electrode
#47 | 2013-10-31Methods of combinatorial processing for screening multiple samples on a semiconductor substrate
#48 | 2013-10-17ALD processing techniques for forming non-volatile resistive switching memories
#49 | 2013-08-15Controlled localized defect paths for resistive memories
#50 | 2013-05-30Methods of combinatorial processing for screening multiple samples on a semiconductor substrate
#51 | 2013-05-02Bipolar resistive-switching memory with a single diode per memory cell
#52 | 2013-04-18High productivity combinatorial dual shadow mask design
#53 | 2013-04-11Method for reducing forming voltage in resistive random access memory
#54 | 2013-03-21Nonvolatile memory elements with metal-deficient resistive-switching metal oxides
#55 | 2013-03-07Nonvolatile memory elements
#56 | 2013-02-21Combinatorial process optimization methodology and system
#57 | 2013-02-21Titanium based high-K dielectric films
#58 | 2013-02-21Non-volatile resistive switching memories formed using anodization
#59 | 2012-10-11Closed loop sputtering controlled to enhance electrical characteristics in deposited layer
#60 | 2012-06-14Methods of combinatorial processing for screening multiple samples on a semiconductor substrate
#61 | 2012-05-17Nonvolatile memory elements
#62 | 2012-03-29Nonvolatile memory elements with metal deficient resistive switching metal oxides
#63 | 2012-02-23Bipolar resistive-switching memory with a single diode per memory cell
#64 | 2012-02-09Combinatorial process optimization methodology and system
#65 | 2011-11-22Combinatorial process optimization methodology and system
#66 | 2009-01-29Nonvolatile memory element including resistive switching metal oxide layers
#67 | 2008-09-11Methods for forming nonvolatile memory elements with resistive-switching metal oxides
#68 | 2008-09-11Nonvolatile memory elements with metal-deficient resistive-switching metal oxides
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