Inventor profile of:

David C. Tannenbaum

City:

Austin, Texas

Country:

United States

Published Applications:

27

Last publication date:

2023-02-16

Top Assignees for applications by David C. Tannenbaum

The entities that hold a legal rights for patent applications filed by inventor Tannenbaum David C.:

Recent patent applications by Tannenbaum David C.

David C. Tannenbaum from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-02-16
US20230052075A1
Physics

Method and apparatus for the automation of variable rate shading in a GPU driver context

#2 | 2022-09-22
US20220301233A1
Physics

Systems and methods of adaptive, variable-rate, hybrid ray tracing

#3 | 2022-06-30
US20220206737A1
Physics

Method and apparatus for displaying multiple devices on shared screen

#4 | 2022-06-23
US20220197976A1
Physics

Flexible-access instructions for efficient access of ML data

#5 | 2022-05-12
US20220148122A1
Physics

Shader accessible configurable binning subsystem

#6 | 2022-05-03
US17227270
Physics

Method and apparatus for graphics driver optimization using daemon-based resources

#7 | 2022-03-03
US20220067876A1
Physics

Methods and apparatus for implementing cache policies in a graphics processing unit

#8 | 2022-03-03
US20220066934A1
Physics

Methods and apparatus for atomic operations with multiple processing paths

#9 | 2022-02-03
US20220036634A1
Physics

Methods and apparatus for pixel packing

#10 | 2022-02-03
US20220036632A1
Physics

POST-PROCESSING IN A MEMORY-SYSTEM EFFICIENT MANNER

#11 | 2021-11-18
US20210358191A1
Physics

PRECISION MODULATED SHADING

#12 | 2020-06-11
US20200184715A1
Physics

Efficient redundant coverage discard mechanism to reduce pixel shader work in a tile-based graphics rendering pipeline

#13 | 2019-12-19
US20190384600A1
Physics

Efficient interface and transport mechanism for binding bindless shader programs to run-time specified graphics pipeline configurations and objects

#14 | 2018-11-29
US20180341489A1
Physics

Power saving branch modes in hardware

#15 | 2018-10-18
US20180300131A1
Physics

System and method for maintaining data in a low-power structure

#16 | 2018-07-12
US20180196771A1
Physics

Central arbitration scheme for a highly efficient interconnection topology in a GPU

#17 | 2018-06-21
US20180172765A1
Physics

Lightweight, low overhead debug bus

#18 | 2018-06-14
US20180164372A1
Physics

Highly flexible performance counter and system debug module

#19 | 2018-05-31
US20180150991A1
Physics

Vertex attribute compression and decompression in hardware

#20 | 2015-06-18
US20150169289A1
Physics

Logic circuitry configurable to perform 32-bit or dual 16-bit floating-point operations

#21 | 2014-11-27
US20140351308A1
Physics

System and method for dynamically reducing power consumption of floating-point logic

#22 | 2009-06-11
US20090150654A1
Physics

Fused multiply-add functional unit

#23 | 2008-07-15
US10944483
-

System and method for delivering multiple data streams via multiple buses

#24 | 2008-07-15
US10913667
-

Culling before setup in viewport and culling unit

#25 | 2008-03-04
US10934119
-

Vertex processing unit supporting vertex texture mapping

#26 | 2007-11-06
US10912930
-

Cull before attribute read

#27 | 2005-01-18
US9960630
-

System, method and computer program product for an improved programmable vertex processing model with instruction set

InventorID:

985693 ⎘