Shingle Springs, California
United States
35
2026-02-05
The entities that hold a legal rights for patent applications filed by inventor Castro Hernan:
Hernan Castro from Shingle Springs, US has applied for patents for these inventions. The list has both pending applications and granted patents:
PROGRAMMING MEMORY CELLS BASED ON CONTEXT IN A MEMORY ARRAY
#2 | 2026-02-05SHUNTING NETWORKS FOR ACCESS LINES IN A MEMORY ARRAY
#3 | 2026-01-29THREE-DIMENSIONAL FERROELECTRIC TUNNEL JUNCTION DEVICE FOR MULTIPLY-ACCUMULATE OPERATIONS
#4 | 2026-01-29NAND MEMORY ARRAY BIASING FOR MATRIX VECTOR MULTIPLICATION
#5 | 2025-12-25MEMORY DEVICE PERFORMING MULTIPLICATION USING LOGICAL STATES OF MEMORY CELLS
#6 | 2025-08-28Three-Dimensional Phase-Change Memory Array Operable to Perform Multiplication Accumulation Operations
#7 | 2025-02-27BURIED LINES AND RELATED FABRICATION TECHNIQUES
#8 | 2025-02-20Truncated Resolution for Time Sliced Computation of Multiplication and Accumulation using a Memory Cell Array
#9 | 2025-01-23THREE-DIMENSIONAL NOR MEMORY DEVICE FOR MULTIPLY-ACCUMULATE OPERATIONS
#10 | 2025-01-09MEMORY DEVICE USING MULTI-PILLAR MEMORY CELLS FOR MATRIX VECTOR MULTIPLICATION
#11 | 2024-09-12MEMORY DEVICE FOR MULTIPLICATION USING MEMORY CELLS WITH DIFFERENT THRESHOLDS BASED ON BIT SIGNIFICANCE
#12 | 2024-09-12MEMORY DEVICE FOR SIGNED MULTI-BIT TO MULTI-BIT MULTIPLICATIONS
#13 | 2024-09-12MEMORY DEVICE FOR SUMMATION OF OUTPUTS OF SIGNED MULTIPLICATIONS
#14 | 2024-09-12MEMORY DEVICE PERFORMING SIGNED MULTIPLICATION USING LOGICAL STATES OF MEMORY CELLS
#15 | 2024-09-12MEMORY DEVICE PERFORMING SIGNED MULTIPLICATION USING SETS OF TWO MEMORY CELLS
#16 | 2024-09-12MEMORY DEVICE FOR MULTIPLICATION USING MEMORY CELLS HAVING DIFFERENT BIAS LEVELS BASED ON BIT SIGNIFICANCE
#17 | 2024-09-12MEMORY DEVICE PERFORMING SIGNED MULTIPLICATION USING SETS OF FOUR MEMORY CELLS
#18 | 2024-09-12MEMORY DEVICE HAVING BONDED INTEGRATED CIRCUIT DIES USED FOR MULTIPLICATION
#19 | 2024-05-30MEMORY DEVICE PERFORMING MULTIPLICATION USING LOGICAL STATES OF MEMORY CELLS
#20 | 2020-10-08Buried lines and related fabrication techniques
#21 | 2018-12-27Apparatuses and methods for efficient write in a cross-point array
#22 | 2017-12-14Apparatuses and methods for efficient write in a cross-point array
#23 | 2017-02-16Apparatuses and methods for efficient write in a cross-point array
#24 | 2016-12-15Apparatuses, devices and methods for sensing a snapback event in a circuit
#25 | 2015-07-30METHOD AND APPARATUS FOR MATCH QUALITY ANALYSIS OF ANALYTE BINDING
#26 | 2015-03-12Accessing memory cells in parallel in a cross-point array
#27 | 2015-02-26Verify or read pulse for phase change memory and switch
#28 | 2014-11-13Apparatuses, devices and methods for sensing a snapback event in a circuit
#29 | 2013-02-21Apparatuses, devices and methods for sensing a snapback event in a circuit
#30 | 2012-05-31Verify or read pulse for phase change memory and switch
#31 | 2011-09-15Method and apparatus for combined electrochemical synthesis and detection of analytes
#32 | 2011-06-23Programming phase change memories using ovonic threshold switches
#33 | 2010-10-14Method and apparatus for match quality analysis of analyte binding
#34 | 2006-11-23Serially sensing the output of multilevel cell arrays
#35 | 2005-12-01Serially sensing the output of multilevel cell arrays
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