Arvind Raman

TECHNIQUES FOR USE OF A DISTRIBUTED THROTTLE ARCHITECTURE TO MITIGATE VOLTAGE DROOP OR CURRENT SPIKES

POWER MUX CIRCUITRY FOR SUPPLY RAIL SWITCHING

SYSTEM, APPARATUS AND METHOD FOR LOCKSTEP CORRECTED ERROR REPORTING, DATA POISONING AND POTENTIAL RECOVERY MECHANISMS

APPARATUS AND METHOD FOR SECURE PLATFORM MONITORING TECHNOLOGY

SOFTWARE VISIBLE AND CONTROLLABLE LOCK-STEPPING WITH CONFIGURABLE LOGICAL PROCESSOR GRANULARITIES

ENERGY CONSUMPTION MEASUREMENT

PROCESSOR CORE SUBSYSTEM WITH OPEN-STANDARD NETWORK-ON-CHIP PORTS

Software visible and controllable lock-stepping with configurable logical processor granularities

Unified retention and wake-up clamp apparatus and method

System, apparatus and method for in-field self testing in a diagnostic sleep state

All-digital closed loop voltage generator

Low power retention flip-flop with level-sensitive scan circuitry

System, apparatus and method for in-field self testing in a diagnostic sleep state

Selecting a low power state based on cache flush latency determination

Selecting a low power state based on cache flush latency determination

Technologies for managing power during an activation cycle

Controlling telemetry data communication in a processor

Technologies for managing power during an activation cycle

Selecting a low power state based on cache flush latency determination

Method and system for run-time reallocation of leakage current and dynamic power supply current

Phase locked loop device and method thereof

Method and apparatus for making a semiconductor device using hardware description having merged functional and test logic blocks