Dimensionally-stable, damage-resistant, glass sheets

Display panel with fewer data lines

Structure and method for forming integral nitride light sensors on silicon substrates

Lightweight self-cooling light sources

Transistor with charge enhanced field plate structure and method

III-nitride transistor with engineered substrate

Method and apparatus for forming a CMOS device

Oxygen controlled PVD aluminum nitride buffer for gallium nitride-based optoelectronic and electronic devices

Rectifier structures with low leakage

Semiconductor apparatus including N-type semiconductor layer

HEMT semiconductor device and a process of forming the same

Process of forming a semiconductor wafer

High electron mobility semiconductor device and method therefor

Carbon doping semiconductor devices

Semiconductor structures having active regions comprising InGaN, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures

Structure and manufacturing method of the structure, and gallium nitride-based semiconductor light-emitting device using the structure and manufacturing method of the device

Method for manufacturing a silicon carbide substrate for an electrical silicon carbide device, a silicon carbide substrate and an electrical silicon carbide device

Lattice mismatched heterojunction structures and devices made therefrom

Power switching module with reduced oscillation

Sol-gel process for the manufacture of high power switches

Semiconductor structure

III-nitride P-channel field effect transistor with hole carriers in the channel

Complementary field effect transistors using gallium polar and nitrogen polar III-nitride material

Semiconductor device with self-aligned ohmic contacts

Silicon carbide semiconductor devices

SiC substrate with SiC epitaxial film

Fin field effect transistors having a nitride containing spacer to reduce lateral growth of epitaxially deposited semiconductor materials

Light emitting diode structure and manufacturing method thereof

Method of fabricating an optoelectronic device with a hollow component in epitaxial layer

Semiconductor device and manufacturing method thereof

Light-receiving and emitting device including integrated light-receiving and emitting element and sensor

Light emitting diode

Light emitting module

Ultra-thin printed LED layer removed from substrate

Ceramic based light emitting diode (LED) devices and methods

Light emitting unit, light emitting device, and lighting device

Semiconductor light emitting device

Integrated multi-chip module optical interconnect platform

Flexible lighting device

Phosphors for warm white emitters

Light-emitting module and method of manufacturing a single light-emitting structure thereof

Engineered-phosphor LED packages and related methods

Volumetric three-dimensional display with evenly-spaced elements

LED module

Stress relief for array-based electronic devices

Semiconductor structures having active regions comprising InGaN, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures

Light-emitting devices having engineered phosphor elements

LED with IC integrated lighting module

Light emitting device

Semiconductor light emitting device package

Group III nitride semiconductor light-emitting device and method for producing the same

Organic light emitting diode with light extracting layer

Wiring board and light emitting device

Color stable red-emitting phosphors

Photoluminescence wavelength conversion components

Light emitting device

Flexible lighting device including a heat-spreading layer

Light-emitting device and method for manufacturing the same

Light emitting device mount, light emitting apparatus including the same, and leadframe

Thermal management in electronic devices with yielding substrates

Light emitting device and method of manufacturing the same

Composite substrates and functional devices

P-contact with more uniform injection and lower optical loss

Enhancement-mode III-nitride devices

Semiconductor device

Dual-gate trench IGBT with buried floating P-type shield

Semiconductor module and method for manufacturing same

Solution Processed Neutron Detector

Epitaxial structure for vertically integrated charge transfer gate technology in optoelectronic materials

Heterostructures for semiconductor devices and methods of forming the same

Semiconductor structure

V-shaped SiGe recess volume trim for improved device performance and layout dependence

Semiconductor device

Method for fabricating a strain feature in a gate spacer of a semiconductor device

SiGe surface passivation by germanium cap

Source/drain structure of semiconductor device

III-V finFETs on silicon substrate

Apparatuses and methods comprising a channel region having different minority carrier lifetimes

Method of forming a gate contact

Semiconductor device and manufacturing method thereof

Semiconductor device and method for producing the same, power supply device, and high-frequency amplifier

Method of forming a HEMT semiconductor device and structure therefor

Method of forming a high electron mobility semiconductor device and structure therefor

Ohmic contact structure for semiconductor device and method

Carbon doping semiconductor devices

Heterojunction bipolar transistor having a germanium raised extrinsic base

Heterojunction bipolar transistor having a germanium extrinsic base utilizing a sacrificial emitter post

High mobility transport layer structures for rhombohedral Si/Ge/SiGe devices

Three-terminal printed devices interconnected as circuits

Metal layer enabling directed self-assembly semiconductor layout designs

Film transferable logic circuit, and methods for providing film transferable logic circuit

Integration of magneto-resistive random access memory and capacitor

Chemical sensor with sidewall spacer sensor surface

Chemical sensor with protruded sensor surface

Backside sensing bioFET with enhanced performance

Chemical sensor with sidewall sensor surface

Chemical sensors with consistent sensor surface areas

Sensor with field effect transistor having the gate dielectric consisting of a layer of lipids and method of fabricating this transistor

Stacked semiconductor device and method of forming the same related cases

MEMS device structure with a capping structure

Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same

Vjfet devices

Interface for metal gate integration

Methods of increasing space for contact elements by using a sacrificial liner and the resulting device

Plug structure

Carbon-doped cap for a raised active semiconductor region

Metal gate structures for field effect transistors and method of fabrication

Fin-type semiconductor device

Methods of forming a semiconductor device with a protected gate cap layer and the resulting device

Methods of forming a semiconductor device with a protected gate cap layer and the resulting device

Wrap around stressor formation

Semiconductor strips with undercuts and methods for forming the same

Counter-doped low-power FinFET

Metal-oxide-semiconductor field-effect transistor with metal-insulator semiconductor contact structure to reduce Schottky barrier

Self-aligned liner method of avoiding PL gate damage

Stress enhanced finFET devices

Memory device and method of manufacturing the same

Semiconductor devices having dielectric caps on contacts and related fabrication methods

Photovoltaic device formed on porous silicon isolation

Depletion-mode field-effect transistor-based phototransitor

Self-aligned implants to reduce cross-talk of imaging sensors

Active pixel sensor having a raised source/drain

Method and apparatus for low resistance image sensor contact

Methods for measuring the full well capacity of CMOS image sensors

Methods and apparatus for CMOS sensors

Structure and method for 3D image sensor

Image sensors including hydrophobic interfaces and methods of fabricating the same

Memory array with self-aligned epitaxially grown memory elements and annular FET

Spin hall effect assisted spin transfer torque magnetic random access memory

Structure and fabrication of memory array with epitaxially grown memory elements and line-space patterns

Spin hall effect assisted spin transfer torque magnetic random access memory

Complementary spin device having a gate, a source, a first and second drain electrode

Ferroelectric field-effect transistor

Methods of forming patterns and methods of manufacturing semiconductor devices using the same

Semiconductor devices having a silicon-germanium channel layer and methods of forming the same

Semiconductor device

Switching element unit

Integrated circuit structure and method for protection from damage to gate dielectric

Semiconductor device

Semiconductor structures with deep trench capacitor and methods of manufacture

Electronic device including a capacitor structure and a process of forming the same

3D semiconductor structure and manufacturing method thereof

Vertical NAND and method of making thereof using sequential stack etching and landing pad

Gettering agents in memory charge storage structures

Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling

Semiconductor memory devices

Non-volatile memory cell having a trapping charge layer in a trench and an array and a method of manufacturing therefor

Floating gate memory cells in vertical memory

Cell pillar structures and integrated flows

Architecture to improve cell size for compact array of split gate flash cell

Method for manufacturing semiconductor memory device and semiconductor memory device

Nonvolatile semiconductor storage device and method of manufacturing the same

Semiconductor devices and methods of manufacturing the same

Non-volatile memory cells with enhanced channel region effective width, and method of making same

Scalable and reliable non-volatile memory cell

Structure and method for manufacture of memory device with thin silicon body

Memory including blocking dielectric in etch stop tier

Structure and manufacturing method of a non-volatile memory

Semiconductor device and methods of manufacturing

Semiconductor element having conductive damascene structures extending perpendicular to doping strips, and manufacturing method of the same

Damascene conductor for 3D array

Nonvolatile semiconductor memory device and method of manufacturing the same

Memory devices having semiconductor patterns on a substrate and methods of manufacturing the same

Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region

Memory transistor with multiple charge storing layers and a high work function gate electrode

Nonvolatile memory cells and methods of making such cells

Method of fabricating MONOS semiconductor device

Back-gated non-volatile memory cell

Silicon on germanium

ESD protection circuit

Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels

Super junction trench metal oxide semiconductor device and method of making the same

Semiconductor device

Semiconductor device

Field effect transistor devices with regrown p-layers

Field effect transistor devices with protective regions

Field effect transistor devices with buried well protection regions

Method of forming a transistor and structure therefor

Semiconductor element and manufacturing method and operating method of the same

Direct-drain trench FET with source and drain isolation

Termination region of a semiconductor device

Semiconductor device and method for forming the same

Shielded gate trench MOSFET package

Methods of forming semiconductor devices using hard mask layers

Accumulation-mode field effect transistor with improved current capability

Electronic device including vertical conductive regions and a process of forming the same

Mechanisms for doping lightly-doped-drain (LDD) regions of finFET devices

Integration of low RdsLDMOS with high sheet resistance poly resistor

Electronic circuit having adjustable transistor device

Switch circuit using LDMOS device

Field effect transistor devices with buried well regions and epitaxial layers

Semiconductor device, integrated circuit and method of manufacturing a semiconductor device

Low on resistance semiconductor device

800 V superjunction device

High-voltage semiconductor device

Lateral double-diffused high voltage device

Semiconductor device having an isolation region separating a lateral double diffused metal oxide semiconductor (LDMOS) from a high voltage circuit region

Bootstrap field effect transistor (FET)

Laterally diffused metal oxide semiconductor

Semiconductor structure profile

FinFET with bottom SiGe layer in source/drain

Method and structure for dielectric isolation in a fin field effect transistor

Barrier layer for FinFET channels

Hybrid ETSOI structure to minimize noise coupling from TSV

Formation of bulk SiGe fin with dielectric isolation by anodization

Forming strained and relaxed silicon and silicon germanium fins on the same wafer

Partially isolated fin-shaped field effect transistors

Semiconductor device and a method for fabricating the same

Stress enhanced finFET devices

Semiconductor device having reduced leakage current at breakdown and method of fabricating thereof

Formation of bulk SiGe fin with dielectric isolation by anodization

Strained silicon nFET and silicon germanium pFET on same wafer

Forming strained and relaxed silicon and silicon germanium fins on the same wafer

Partially isolated Fin-shaped field effect transistors

Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching

Hybrid extremely thin silicon-on-insulator (ETSOI) structure to minimize noise coupling from TSV

Pixel structure with pixel electrode connected to conductive pattern through plural contact holes

Ditches near semiconductor fins and methods for forming the same

Semiconductor device including dummy isolation gate structure and method of fabricating thereof

Metal oxide semiconductor (MOS) isolation schemes with continuous active areas separated by dummy gates and related methods

Semiconductor component and method of manufacture

Integrated circuits and methods for fabricating integrated circuits with active area protection

Spacer enabled poly gate

3D memory process and structures

Epitaxial growth between gates

HK/MG process flows for P-type semiconductor devices

Isolation structure

Gate pad and gate feed breakdown voltage enhancement

Stripe orientation for trenches and contact windows

Semiconductor structure and manufacturing method for the same

Semiconductor device

Transistor with deep Nwell implanted through the gate

Metal gate structure and method

Merged active devices on a common substrate

Multi-gate transistor

Multi-gate and complementary varactors in FinFET process

Local interconnect structures for high density

Methods of forming alignment marks and overlay marks on integrated circuit products employing FinFET devices and the resulting alignment/overlay mark

FINFET devices having a body contact and methods of forming the same

RF switch on high resistive substrate

Asymmetric cyclic depositon and etch process for epitaxial formation mechanisms of source and drain regions

Strip-ground field plate

Gate stack of boron semiconductor alloy, polysilicon and high-k gate dielectric for low voltage applications

Gate stack of boron semiconductor alloy, polysilicon and high-K gate dielectric for low voltage applications

Methods for forming protection layers on sidewalls of contact etch stop layers

Gas sensor comprising a set of one or more sensor cells

Methods of forming buried electromechanical structures coupled with device substrates and structures formed thereby

MEMS method and structure

Integrated structure with bidirectional vertical actuation

Microelectromechanical system and method

MEMS integrated pressure sensor devices and methods of forming same

Micromechanical acceleration sensor having conductor tracks and cavities

Low frequency response microphone diaphragm structures and methods for producing the same

Semiconductor devices and methods of forming thereof

MEMS pressure sensor and microphone devices having through-vias and methods of forming same

Microphone package with integrated substrate