171852 ⎘
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere; Testing of electronic circuits, e.g. by signal tracer; Testing of digital circuits Functional testing
Sub-classes:FUNCTIONAL EVENT MANAGEMENT SYSTEM AND METHOD
#2LOGIC BIST CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING SAME
#3CO-DEBUG OF PROCESSING CONDITIONS OF LOGIC DEVICES
#4FUNCTIONAL SAFETY PROTECTION METHOD FOR COMPUTING CIRCUIT AND ELECTRONIC DEVICE
#5LOGIC BIST CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING SAME
#6DETECTING AND MITIGATING SIDE CHANNEL ATTACKS WITH RAZOR-FLOPS
#7DETECTING AND MITIGATING SIDE CHANNEL ATTACKS WITH RAZOR-FLOPS
#8Programmable scan chain debug technique
#9Simulating memory cell sensing for testing sensing circuitry
#10Self diagnostic apparatus for electronic device
#11CROSSTALK PATTERN DETECTING DEVICE AND DETECTING METHOD
#12Facilitating debugging electronic device, system and method thereof
#13Determining a voltage and/or frequency for a performance mode
#14Failure diagnostic apparatus and failure diagnostic method
#15Fault detection circuit for a PWM driver, related system and integrated circuit
#16Integrated circuit device with integrated fault monitoring system
#17Fault detection circuit for a PWM driver, related system and integrated circuit
#18Arithmetic processing device and method therefor
#19Integrated circuit fault detection
#20ATE compatible high-efficient functional test
#21Single circuit fault detection
#22Non-destructive recirculation test support for integrated circuits
#23Independently driving built-in self test circuitry over a range of operating conditions
#24SENSOR MODULE
#25Fault detection circuit for a PWM driver, related system and integrated circuit
#26Hybrid fibre coaxial fault classification in cable network environments
#27Radio frequency signal fault signature isolation in cable network environments
#28Semiconductor memory device and method for detecting weak cells
#29Systems and methods for SerDes physical layer qualification and mitigation
#30Test device and test system having the same
#31Light-on module testing device, method for testing light-on module and method for testing display panel
#32Semiconductor memory apparatus
#33Testing apparatus for electronic device
#34Integrated circuit and method of operating an integrated circuit
#35SYSTEM AND METHOD FOR PERFORMING PROCESSING IN A TESTING SYSTEM
#36Monitoring circuit of semiconductor device to monitor a read-period signal during activation of a boot-up enable signal
#37Test circuits
#38On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems
#39On-the-fly test and debug logic for ATPG failures of designs using on-chip clocking
#40Testing and mitigation framework for networked devices
#41SYNCHRONIZED TESTING OF MULTIPLE WIRELESS DEVICES
#42Method and evaluation device for checking plausibility of an incremental counter
#43Hardware-based memory initialization
#44Method, system and apparatus for evaluation of input/output buffer circuitry
#45ELECTRONIC DEVICE AND METHOD FOR MANAGING TEST ITEMS OF AN OBJECT
#46Modeling test space for system behavior with optional variable combinations
#47TESTING AND MITIGATION FRAMEWORK FOR NETWORKED DEVICES
#48Testing and mitigation framework for networked devices
#49On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems
#50Semiconductor device with a test circuit and a reference circuit
#51Method and apparatus for statistical CMOS device characterization
#52Circuit arrangement with a test circuit and a reference circuit and corresponding method
#53CIRCUIT ARRANGEMENT AND METHOD OF TESTING AND/OR DIAGNOSING THE SAME
#54Method and apparatus for statistical CMOS device characterization
#55Method for testing liquid crystal display panels
#56Serializer/de-serializer bus controller interface
#57Random number test circuit, random number generation circuit, semiconductor integrated circuit, IC card and information terminal device
#58System and method for performing processing in a testing system
#59System and method for performing processing in a testing system
#60System and method for performing processing in a testing system
#61System and method for performing processing in a testing system
#62System and method for performing processing in a testing system
#63System and method for performing processing in a testing system
#64Circuit reset testing methods
#65Method and system for analyzing single event upset in semiconductor devices
#66Test output compaction with improved blocking of unknown values
#67Multiple function results using single pattern and method
#68APPARATUS AND METHOD FOR AUTOMATED TEST SETUP
#69Random number test circuit, random number generation circuit, semiconductor integrated circuit, IC card and information terminal device
#70Semiconductor device and method of inspecting the same
#71Integrated circuit with self-testing circuit
#72Reducing leakage power in low-power mode of an integrated circuit device
#73Method and system for generating validation tests
#74Securing access to integrated circuit scan mode and data
#75System and method for array diagnostics in superconducting integrated circuit
#76Latency measurement system and method