171858 ⎘
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere; Testing of electronic circuits, e.g. by signal tracer; Testing of digital circuits; Functional testing; Generation of test inputs, e.g. test vectors, patterns or sequences for combinational circuits
Scan tree construction
#2Integrating machine learning delay estimation in FPGA-based emulation systems
#3Machine learning delay estimation for emulation systems
#4Semiconductor integrated circuit having scan chains sequentially supplied with a clock signal
#5Testing device and testing method for testing a device under test
#6Test response compaction scheme
#7Method of fault tolerance in combinational circuits
#8Apparatus and method for improved test controllability and observability of random resistant logic
#9System and method for signature-based systematic condition detection and analysis
#10Apparatus and method for bit pattern learning and computer product