171880 ⎘
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere; Testing of electronic circuits, e.g. by signal tracer; Testing of digital circuits; Functional testing; Reconfiguring for testing, e.g. LSSD, partitioning; Test of Sequential circuits Test of registers
ELECTRONIC FUSE DEVICE AND OPERATION METHOD THEREOF
#2High throughput sort
#3Processing Devices for reducing scan traffic, Method and Computer Program
#4Scan compression through pin data encoding
#5Data recorder
#6Semiconductor memory device and operating method thereof
#7Circuit and testing circuit thereof
#8Method for allocating addresses and corresponding units
#9Scan chain techniques and method of using scan chain structure
#10Systems and methods for determining systematic defects
#11Implementing register array (RA) repair using LBIST
#12Generating test sets for diagnosing scan chain failures
#13Generating test sets for diagnosing scan chain failures
#14Generating test sets for diagnosing scan chain failures
#15Methods and apparatus for pulse generation used in characterizing electronic fuses
#16Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit
#17Method and context switch device for implementing design-for-testability functionality of latch-based register files
#18Test circuit, selector, and semiconductor integrated circuit
#19Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit
#20Method and apparatus for automatically testing the design of a simulated integrated circuit
#21Scan compression through pin data encoding
#22Dynamically protective scan data control
#23Built-in self test controller for a random number generator core