189493 ⎘
Methods or arrangements for processing data by operating upon the order or content of the data handled; Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices Denomination or exception handling, e.g. rounding or overflow
Sub-classes:MULTIPLIER WITH IN-PATH SUBNORMAL HANDLING
#2LOOP UNROLLING PROCESSING APPARATUS, METHOD, AND PROGRAM
#3ELECTRONIC CONTROL DEVICE AND STEERING SYSTEM
#4COMPUTING DEVICE, RECOGNITION DEVICE, AND CONTROL DEVICE
#5APPARATUS AND METHOD FOR VECTOR PACKED MULTIPLY OF SIGNED AND UNSIGNED WORDS
#6Processing-in-memory devices having multiple operation circuits
#7MULTIPLICATION/ACCUMULATION OPERATORS HAVING MULTIPLE OPERATION CIRCUITS
#8MULTIPLE OPERATION CIRCUITS, MULTIPLICATION/ACCUMULATION OPERATORS HAVING THE MULTIPLE OPERATION CIRCUITS, AND PROCESSING-IN-MEMORY DEVICES HAVING THE MULTIPLE OPERATION CIRCUITS
#9FOUR-BIT TRAINING FOR MACHINE LEARNING
#10Programmable Device Implementing Fixed and Floating Point Functionality in a Mixed Architecture
#11Computing device and method
#12Conversion hardware mechanism
#13Programmable device implementing fixed and floating point functionality in a mixed architecture
#14Control systems and methods
#15Operation processing apparatus, information processing apparatus and information processing method
#16Arithmetic processor, arithmetic processing apparatus including arithmetic processor, information processing apparatus including arithmetic processing apparatus, and control method for arithmetic processing apparatus
#17Cracked execution of move-to-FPSCR instructions
#18Reproducible stochastic rounding for out of order processors
#19Implementation of floating-point trigonometric functions in an integrated circuit device
#20Reproducible stochastic rounding for out of order processors
#21Check procedure for floating point operations
#22Partial stochastic rounding that includes sticky and guard bits
#23Reproducible stochastic rounding for out of order processors
#24Lane position information for processing of vector
#25Check procedure for floating point operations
#26Number format pre-conversion instructions
#27Floating-point error detection and correction
#28Mixed precision estimate instruction computing narrow precision result for wide precision inputs
#29Mixed precision estimate instruction computing narrow precision result for wide precision inputs
#30Processing core with speculative register preprocessing in unused execution unit cycles
#31Number format pre-conversion instructions
#32Floating point encoding systems and methods
#33Electronic computing circuit for operand width reduction for a modulo adder followed by saturation concurrent message processing
#34Method of Specifying and Tracking Precision in Floating-point Calculation
#35System and method for a floating point unit with feedback prior to normalization and rounding
#36Floating point encoding systems and methods
#37DSP processor architecture with write datapath word conditioning and analysis
#38Programmable device implementing fixed and floating point functionality in a mixed architecture