189526 ⎘
Methods or arrangements for processing data by operating upon the order or content of the data handled; Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices; Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages using carry look-ahead circuits
LOGIC GATE COMPLEXITY
#2SECURE ADDER HAVING CARRY-SAFE ADDER TO VERIFY RESULT OF SECURE ADDITION OPERATION PERFORMED BY SECURE CARRY-LOOKAHEAD ADDER
#3ADDITION CIRCUITRY
#4BOOTH MULTIPLIER FOR COMPUTE-IN-MEMORY
#5CONCURRENT MULTI-BIT ADDER
#6ASYNCHRONOUS CARRY-RIPPLE ADDER WITH MAJORITY OR MINORITY GATES
#7Carry-lookahead adder, secure adder and method for performing carry-lookahead addition
#8CARRY-LOOKAHEAD ADDER, SECURE ADDER AND METHOD FOR PERFORMING CARRY-LOOKAHEAD ADDITION
#9Multi-input configurable logic cell with configurable output region
#10Protection system and method
#11Concurrent multi-bit adder
#12RADIX-1000 DECIMAL FLOATING-POINT NUMBERS AND ARITHMETIC UNITS USING A SKEWED REPRESENTATION OF THE FRACTION
#13Concurrent multi-bit adder
#14Concurrent multi-bit adder
#15Vector checksum instruction
#16Vector checksum instruction
#17Vector checksum instruction
#18Vector checksum instruction
#19Mixed-radix carry-lookahead adder architecture
#20ADDING APPARATUS USING TIME INFORMATION AND A METHOD THEREOF
#21Vector checksum instruction
#22Vector checksum instruction
#23Carry look-ahead adder with generate bits and propagate bits used for column sums
#24Fast carry lookahead circuits
#25Decimal adder with end around carry
#26Near optimal configurable adder tree for arbitrary shaped 2D block sum of absolute differences (SAD) calculation engine
#27STATIC LOGIC LING ADDER
#28Configurable hybrid adder circuitry
#29N-BIT ADDER AND CORRESPONDING ADDITION METHOD
#30Carry look-ahead circuit and carry look-ahead method
#31Method of forcing 1's and inverting sum in an adder without incurring timing delay
#32Universal execution unit
#33Methods and apparatus for carry generation in a binary look ahead system
#34SYSTEM HAVING A CARRY LOOK-AHEAD (CLA) ADDER
#35System, method and apparatus for an incremental modular process including modular multiplication and modular eduction
#36Sparse tree adder
#37Method and a circuit using an associative calculator for calculating a sequence of non-associative operations
#38Sparse tree adder circuit
#39Method of forcing 1's and inverting sum in an adder without incurring timing delay
#40Mixed-type adder comprising multiple sub-adders having different carry propagation schemes
#41Apparatus and method for an address generation circuit
#42Highly parallel structure for fast multi cycle binary and decimal adder unit
#43Method and system for digital signal processing, program product therefor
#44Digital circuit
#45Adder structure with midcycle latch for power reduction
#46Carry look-ahead adder having a reduced area
#47Method and circuits for early detection of a full queue
#48Memristor-based adders using memristors-as-drivers (MAD) gates
#49Synthesis of fast squarer functional blocks