LARGE MEMORY WINDOW VERTICAL NAND FERROELECTRIC CHARGE PUMPING FIELD EFFECT TRANSISTOR FOR HIGH-DENSITY AND LOW-POWER STORAGE

METHODS FOR REFRESHING DATA ALONGSIDE PROGRAMMING OR ERASE OPERATIONS

SEMICONDUCTOR DEVICES

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

COMPUTE-IN-MEMORY DEVICES, SYSTEMS AND METHODS OF OPERATION THEREOF

MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACKED HORIZONTAL ACTIVE STRIPS WITH VERTICAL CONTROL GATES

MEMORY DEVICE AND OPERATING METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICE

Integrated Assemblies and Methods of Forming Integrated Assemblies

METHOD FOR FORMING SEMICONDUCTOR MEMORY STRUCTURE

SONOS STRUCTURE, METHOD FOR PROGRAMMING THE SAME AND METHOD FOR FORMING THE SAME, AND MEMORY

Memory Cells and Integrated Assemblies having Charge-Trapping-Material with Trap-Enhancing-Additive

NON-VOLATILE MEMERY CELL AND METHOD OF FORMING THE SAME

NON-VOLATILE MEMERY CELL AND METHOD OF FORMING THE SAME

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

MEMORY DEVICE, OPERATION METHOD OF MEMORY DEVICE, AND MEMORY SYSTEM

MEMORY CIRCUIT, SYSTEM AND METHOD OF ORGANIZATION FOR RAPID RETRIEVAL OF DATA SETS

FLASH MEMORY DEVICE AND METHOD THEREOF

MEMORY TRANSISTOR WITH MULTIPLE CHARGE STORING LAYERS AND A HIGH WORK FUNCTION GATE ELECTRODE

INTEGRATED ASSEMBLIES, AND METHODS OF FORMING INTEGRATED ASSEMBLIES

SEMICONDUCTOR DEVICE

Memory Cells and Integrated Assemblies having Charge-Trapping-Material with Trap-Enhancing-Additive

Semiconductor memory device

SYNAPSE DEVICE, MANUFACTURING METHOD THEREOF, AND NEUROMORPHIC DEVICE INCLUDING SYNAPSE DEVICE

Oxide-Nitride-Oxide Stack Having Multiple Oxynitride Layers

Unchangeable physical unclonable function in non-volatile memory

SEMICONDUCTOR MEMORY DEVICE

Memory circuit, system and method for rapid retrieval of data sets

Semiconductor device and method for manufacturing same

SYNAPSE DEVICE, MANUFACTURING METHOD THEREOF, AND NEUROMORPHIC DEVICE INCLUDING SYNAPSE DEVICE

MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

AND TYPE FLASH MEMORY, PROGRAMMING METHOD AND ERASING METHOD

METHODS FOR REDUCING DISTURB ERRORS BY REFRESHING DATA ALONGSIDE PROGRAMMING OR ERASE OPERATIONS

Read only memory

Multi-gate nor flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates

Memory device for computing in-memory

NOR-TYPE MEMORY DEVICE, METHOD OF MANUFACTURING NOR-TYPE MEMORY DEVICE, AND ELECTRONIC APPARATUS INCLUDING MEMORY DEVICE

SYNAPTIC DEVICE, NEUROMORPHIC DEVICE INCLUDING SYNAPTIC DEVICE, AND OPERATING METHODS THEREOF

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

Semiconductor memory device

THREE-DIMENSIONAL VERTICAL NOR FLASH THIN FILM TRANSISTOR STRINGS

NONVOLATILE MEMORY DEVICE AND OPERATION METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICE

Memory circuit, system and method for rapid retrieval of data sets

Chalcogenide memory device compositions

Memory array

METHOD OF REDUCING PROGRAM DISTURBANCE IN MEMORY DEVICE AND MEMORY DEVICE UTILIZING SAME

Memory cell of charge-trapping non-volatile memory

Current generator for memory sensing

Integrated assemblies and methods of forming integrated assemblies

Memory cells and integrated assemblies having charge-trapping-material with trap-enhancing-additive

Unchangeable physical unclonable function in non-volatile memory

Erase power loss indicator (EPLI) implementation in flash memory device

Semiconductor memory device

Memory circuit, system and method for rapid retrieval of data sets

Method for forming semiconductor memory structure

3D and flash memory device and method of fabricating the same

Semiconductor storage device and method of manufacturing semiconductor storage device

Semiconductor memory having both volatile and non-volatile functionality and method of operating

Block-to-block isolation and deep contact using pillars in a memory array

MEMORY CIRCUIT, SYSTEM AND METHOD FOR RAPID RETRIEVAL OF DATA SETS

THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Memory transistor with multiple charge storing layers and a high work function gate electrode

Semiconductor device and method for manufacturing same

Flash memory device and method thereof

3D memory semiconductor devices and structures with bit-line pillars

Oxide-nitride-oxide stack having multiple oxynitride layers

Semiconductor storage device

Integrated assemblies, and methods of forming integrated assemblies

Memory controller for resolving string to string shorts

Operation method of multi-bits read only memory

Operation method of multi-bits read only memory

Compute-in-memory devices, systems and methods of operation thereof

SEMI-CONDUCTOR DEVICE HAVING DOUBLE-GATE AND METHOD FOR SETTING SYNAPSE WEIGHT OF TARGET SEMI-CONDUCTOR DEVICE WITHIN NEURAL NETWORK

3-dimensional nor strings with segmented shared source regions

Semiconductor memory structure and method for forming the same

Integrated circuit device including vertical memory

3-dimensional NOR memory array architecture and methods for fabrication thereof

Read only memory

Methods for reducing disturb errors by refreshing data alongside programming or erase operations

Neuromorphic circuit including spike regulator based on flash memory

Neural network circuit comprising nonvolatile memory cells and reference-current cells

Multi-gate nor flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates

Method for programming charge trap flash memory

Asymmetric junctions of high voltage transistor in NAND flash memory

Oxide-nitride-oxide stack having multiple oxynitride layers

MOSFET and memory cell having improved drain current through back bias application

Memory cell of non-volatile memory

Method of reducing program disturbance in memory device and memory device utilizing same

SEMICONDUCTOR MEMORY DEVICE

Semiconductor memory

Methods of erasing semiconductor non-volatile memories

Integrated assemblies, and methods of forming integrated assemblies

Integrated assemblies and methods of forming integrated assemblies

Memory transistor with multiple charge storing layers and a high work function gate electrode

Memory controller for resolving string to string shorts

Semiconductor device comprising memory cells

Implementing logic function and generating analog signals using NOR memory strings

Three-dimensional vertical nor flash thin-film transistor strings

Semiconductor memory device

Semiconductor device

Embedded memory using SOI structures and methods

SEMICONDUCTOR MEMORY DEVICE

OXIDE-NITRIDE-OXIDE STACK HAVING MULTIPLE OXYNITRIDE LAYERS

High-voltage shifter with reduced transistor degradation

Semiconductor device

3-dimensional NOR strings with segmented shared source regions

Multifunctional memory cells

Memory transistor with multiple charge storing layers and a high work function gate electrode

Semiconductor memory device and method of manufacturing the same

Array of nor memory strings and system for rapid data retrieval

Semiconductor device and method for manufacturing same

Memory cells and integrated assemblies having charge-trapping-material with trap-enhancing-additive

Memory cell with isolated well region and associated non-volatile memory

Erasable programmable non-volatile memory

Method of sequentially biasing bias lines in memory device for program disturbance reduction and memory device utilizing same

Unchangeable physical unclonable function in non-volatile memory

Memory arrays and methods used in forming a memory array

Semiconductor memory device

Charge storage and sensing devices and methods

Storage device monitoring and storing on cell counts of blocks and operating method thereof

Memory stacks having silicon nitride gate-to-gate dielectric layers and methods for forming the same

Memory stacks having silicon oxynitride gate-to-gate dielectric layers and methods for forming the same

Three-dimensional vertical NOR flash thin-film transistor strings

Multi-gate thin film transistor memory

3D memory array having select lines

Non-volatile memory device

Weight memory device with variable capacitance, weight memory system, and operation methods therefor

Structures and methods for reducing stress in three-dimensional memory device

Semiconductor memory having both volatile and non-volatile functionality and method of operating

Semiconductor memory device with protruding separating portions

Methods and systems of cell-array programming for neural compute using flash arrays

Semiconductor memory device

STORAGE MEMORY DEVICE

3-dimensional NOR memory array architecture and methods for fabrication thereof

Asymmetric pass field-effect transistor for nonvolatile memory

Integrated circuit device including vertical memory

Three-dimensional vertical NOR flash thin-film transistor strings

Vertical memory devices

Vertical flash memory cell with selector for fast read

3D NOR memory having vertical source and drain structures

Memory system and operating method thereof

Memory read apparatus and methods

Pre-charge voltage for inhibiting unselected NAND memory cell programming

Memory stacks having silicon nitride gate-to-gate dielectric layers and methods for forming the same

Memory stacks having silicon oxynitride gate-to-gate dielectric layers and methods for forming the same

Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates

Multi-state programming in memory device with loop-dependent bit line voltage during verify

Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays

Suppression of program disturb with bit line and select gate voltage regulation

Nonvolatile semiconductor storage device

Semiconductor memory device

Semiconductor memory device

Semiconductor memory device

Memory arrays and methods used in forming a memory array

3-dimensional NOR memory array architecture and methods for fabrication thereof

DENSE ARRAYS AND CHARGE STORAGE DEVICES

Semiconductor memory device

Charge storage and sensing devices and methods

High-voltage shifter with reduced transistor degradation

Semiconductor device and method for manufacturing same

Semiconductor device

System for converting neuron current into neuron current-based time pulses in an analog neural memory in a deep learning artificial neural network

Power management for an analog neural memory in a deep learning artificial neural network

Structures and methods for reducing stress in three-dimensional memory device

Implementing logic function and generating analog signals using NOR memory strings

3-dimensional arrays of NOR-type memory strings

Memory device and operating method thereof

OPERATION METHOD OF NONVOLATILE MEMORY DEVICE AND STORAGE DEVICE

Methods of erasing semiconductor non-volatile memories

Semiconductor memory device and method of operating the same

3-dimensional NOR strings with segmented shared source regions

Nonvolatile memory device having a memory-transistor gate-electrode provided with a charge-trapping gate-dielectric layer and two sidewall select-transistor gate-electrodes

Pre-charge voltage for inhibiting unselected NAND memory cell programming

VECTOR-BY-MATRIX MULTIPLIER MODULES BASED ON NON-VOLATILE 2D AND 3D MEMORY ARRAYS

Semiconductor memory device and operating method thereof

Flash memory device and method

Post write erase conditioning

Storage device monitoring and storing on cell counts of blocks and operating method thereof

Multifunctional memory cells

Oxide-nitride-oxide stack having multiple oxynitride layers

MOSFET and memory cell having improved drain current through back bias application

Semiconductor device and method of fabricating the same

Semiconductor memory device

Multi-level cell thin-film transistor memory and method of fabricating the same

Semiconductor packages, storage devices including the same, and method of operating the semiconductor packages

Charge storage and sensing devices and methods

Semiconductor memory device

Semiconductor memory device and control method thereof

Semiconductor memory device

Feedback field-effect array device capable of converting between volatile and non-volatile operations and array circuit using the same

Semiconductor storage device and manufacturing method thereof

Programmable charge storage transistor, an array of elevationally-extending strings of memory cells, methods of forming Si3Nx, methods of forming insulator material that is between a control gate and charge-storage material of a programmable charge-storage transistor, methods of forming an array of elevationally-extending strings of memory cells, a programmable charge-storage transistor manufactured in accordance with methods, and an array of elevationally-extending strings of memory cells man

Device structure for a 3-dimensional NOR memory array and methods for improved erase operations applied thereto

BIAS SCHEME FOR WORD PROGRAMMING IN NON-VOLATILE MEMORY AND INHIBIT DISTURB REDUCTION

Non-volatile memory with countermeasure for select gate disturb

Semiconductor memory having both volatile and non-volatile functionality and method of operating

Program and erase memory structures

Three-dimensional memory devices

Memory circuit, system and method for rapid retrieval of data sets

Asymmetric pass field-effect transistor for non-volatile memory

Memory transistor with multiple charge storing layers and a high work function gate electrode

Semiconductor memory device and method of manufacturing the same

Embedded memory using SOI structures and methods

Nonvolatile memory device and operating method thereof

NON-VOLATILE MEMORY DEVICE, MICROCOMPUTER, AND ELECTRONIC DEVICE

Parasitic noise control during sense operations

Semiconductor device and method of fabricating the same

Semiconductor memory device

Single pulse SLC programming scheme

Semiconductor device and method of manufacturing thereof

METHOD FOR PERFORMING PROGRAM INHIBIT OPERATION WITH CELL DISTURBANCE ALLEVIATION, MEMORY DEVICE AND CONTROLLER

Compact non-volatile memory device of the type with charge trapping in a dielectric interface

Multifunctional memory cells

Semiconductor memory device and method for programming shared page data in memory cells of two different word lines

Operation method of nonvolatile memory device and storage device

Memory cells with tunneling materials including lanthanum oxide

Memory device and memory system

Methods of forming sin, methods of forming insulator material between a control gate and charge-storage material of a programmable charge-storage transistor, and methods of forming an array of elevationally-extending strings of memory cells and a programmable charge-storage transistor manufactured in accordance with methods

SEMICONDUCTOR MEMORY

Three-dimensional vertical NOR flash thin-film transistor strings

Ramp down sensing between program voltage and verify voltage in memory device

SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES

Peak current suppression

Semiconductor device and method for manufacturing same

DRAM device with embedded flash memory for redundancy and fabrication method thereof

Molecular synthesis device

Memory devices having vertically extending channel structures therein

Suppression of program disturb with bit line and select gate voltage regulation

MOS component, electric circuit, and battery unit for a motor vehicle

Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same

Memory system

Semiconductor device

Semiconductor device

Semiconductor device

Semiconductor device

Three-dimensional memory devices containing memory stack structures with laterally separated charge storage elements and method of making thereof

Semiconductor memory device and operating method

Method of performing feedforward and recurrent operations in an artificial neural network using nonvolatile memory cells

Three-dimensional non-volatile memory and manufacturing method thereof

Stacked FinFET EEPROM

Three-dimensional memory device including partially surrounding select gates and fringe field assisted programming thereof

Memory system and operating method thereof

Vector-by-matrix multiplier modules based on non-volatile 2D and 3D memory arrays

Memory device with various pass voltages

Three-dimensional non-volatile memory device with cut off time control

Non-volatile memory device and method of blank check

Non-volatile memory array with memory gate line and source line scrambling

Semiconductor memory device

Three-dimensional vertical NOR flash thin-film transistor strings

Error characterization and mitigation for 16nm MLC NAND flash memory under total ionizing dose effect

Stacked FinFET EEPROM

Semiconductor memory device and operation method thereof

Embedded memory using SOI structures and methods

Post write erase conditioning

SYSTEM, APPARATUS, AND METHOD OF PROGRAMMING A ONE-TIME PROGRAMMABLE MEMORY CIRCUIT

Memory read apparatus and methods

Bias scheme for word programming in non-volatile memory and inhibit disturb reduction

Semiconductor memory device

Semiconductor memory device and operating method thereof

Operation method of memory controller and operation method of storage device

Semiconductor memory device

Multifunctional memory cells

Nonvolatile memory device including row decoder

Semiconductor memory device and operating method thereof

Vertical memory devices and methods of manufacturing vertical memory devices

Semiconductor device and method of fabricating the same

Increased terrace configuration for non-volatile memory

Semiconductor memory device

Semiconductor memory device

NOR flash memory

Wiring line structure of three-dimensional memory device

Semiconductor memory device and operating method thereof

Nonvolatile memory device for performing urgent read operation based on suspend command and method of operating the same

Memory device and operating method thereof

Semiconductor memory device and operation method thereof

Memory system and operating method thereof

Semiconductor storage device

Selective deposition of SiN on horizontal surfaces

Flash memory components and methods

Three dimensional NOR flash memory with isolated source lines and method of operating the same

3D NAND array with divided string architecture

Memory cells programmed via multi-mechanism charge transports

Multifunctional memory cells

Multifunctional memory cells

Multifunctional memory cells

Method for manufacturing a semiconductor device

System controller and method for determining the location of the most current data file stored on a plurality of memory circuits

Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays

Three-dimensional vertical NOR flash thing-film transistor strings

Non-volatile storage with adaptive redundancy

Oxide-nitride-oxide stack having multiple oxynitride layers

Oxide-nitride-oxide stack having multiple oxynitride layers

3-dimensional NOR memory array architecture and methods for fabrication thereof

3-dimensional nor strings with segmented shared source regions

Asymmetric pass field-effect transistor for nonvolatile memory

Optically restorable semiconductor device, method for fabricating the same, and flash memory device using the same

Semiconductor memory including semiconductor oxide

Multi-level semiconductor memory device and structure

Semiconductor device and method for manufacturing same