199655 ⎘
Erasable programmable read-only memories electrically programmable; Auxiliary circuits, e.g. for writing into memory; Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention; Arrangements for verifying correct programming or erasure; Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing Circuits or methods to prevent overerasing of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasing
NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING A NONVOLATILE MEMORY DEVICE
#2MEMORY DEVICE AND METHOD OF OPERATING THE SAME
#3Memory device and erasing method thereof
#4Memory device and operating method for performing pre-program operation on over-erasure cells
#5Electronic device, over-erase detection and elimination methods for memory cells
#6Memory apparatus and method of operation using adaptive erase time compensation for segmented erase
#7Destruction of data and verification of data destruction on a memory device
#8Memory device for improving weak-program or stuck bit
#9STORAGE STRUCTURE AND ERASE METHOD THEREOF
#10Destruction of data and verification of data destruction on a memory device
#11Asymmetric LLR generation using assist-read
#12REDUCED-PASS ERASE VERIFY FOR NONVOLATILE STORAGE MEDIA
#13Memory system controlling a threshold voltage in a read operation and method
#14Memory system, operation method thereof, and nonvolatile memory device
#15Nonvolatile memory device and storage device including the nonvolatile memory device
#16Semiconductor device, pre-write program, and restoration program
#17Segmented erase in memory
#18Non-volatile semiconductor memory and erasing method thereof
#19Nonvolatile memory device and storage device including the nonvolatile memory device
#20Nonvolatile memory erasure method and device
#21Erase method for flash
#22Non-volatile memory device and method of fabricating the same
#23PFET nonvolatile memory
#24Method and apparatus of performing an erase operation on a memory integrated circuit
#25Method and apparatus for operation of a NAND-like dual charge retaining transistor NOR flash memory device
#26Nonvolatile memory device including circuit formed of thin film transistors
#272T NOR-TYPE NON-VOLATILE MEMORYT CELL ARRAY AND METHOD OF PROCESSING DATA OF 2T NOR-TYPE NON-VOLATILE MEMORY
#28Sector configure registers for a flash device generating multiple virtual ground decoding schemes
#29Flash mirror bit architecture using single program and erase entity as logical cell
#30Dynamic erase state in flash device
#31EEPROM emulation in flash device
#32Method and apparatus for adaptive memory cell overerase compensation
#33Nonvolatile semiconductor memory device
#34Method for erasing flash memory
#35Nonvolatile memory device including circuit formed of thin film transistors
#36Methods for partitioned erase and erase verification in non-volatile memory to compensate for capacitive coupling effects
#37Method for performing operations by applying periodic voltage pulses to control gate of an ono memory cell
#38NONVOLATILE MEMORY DEVICE INCLUDING CIRCUIT FORMED OF THIN FILM TRANSISTORS
#39Non-volatile memory and operating method thereof
#40Three cycle SONOS programming
#41Hybrid non-volatile memory
#42Non-volatile memory embedded in a conventional logic process and methods for operating same
#43pFET nonvolatile memory
#44Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
#45Method and apparatus for adaptive memory cell overerase compensation
#46Nonvolatile semiconductor memory device
#47Non-volatile memory embedded in a conventional logic process and methods for operating same
#48Non-volatile memory embedded in a conventional logic process and methods for operating same
#49Non-volatile memory embedded in a conventional logic process and methods for operating same
#50Non-volatile memory device and erasing method thereof
#51Array source line (AVSS) controlled high voltage regulation for programming flash or EE array
#52Method for partitioned erase and erase verification to compensate for capacitive coupling effects in non-volatile memory
#53Partitioned soft programming in non-volatile memory
#54Nonvolatile memory device including circuit formed of thin film transistors
#55Flash memory device and erasing method thereof
#56Nonvolatile semiconductor memory device and method of operating the same which stably perform erase operation
#57Non-volatile memory embedded in a conventional logic process and methods for operating same
#58Method of erasing an EEPROM device
#59Counteracting overtunneling in nonvolatile memory cells
#60Flash memory device and related erase operation
#61System for improving endurance and data retention in memory devices
#62Array source line (AVSS) controlled high voltage regulation for programming flash or EE array
#63Method for operating a semiconductor memory device and semiconductor memory device
#64Fabrication method of non-volatile memory
#65Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#66Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#67Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#68Nonvolatile memory device including circuit formed of thin film transistors
#69Memory architecture with enhanced over-erase tolerant control gate scheme
#70Vertical device 4FEEPROM memory
#71Nonvolatile semiconductor memory device
#72Non-volatile memory, fabrication method thereof and operation method thereof
#73Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
#74Erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells
#75Soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells
#76Systems for erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells
#77Systems for soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells
#78Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
#79Semiconductor device, reset control system and memory reset method
#80Nonvolatile memory and method of erasing for nonvolatile memory
#81Hybrid non-volatile memory
#82Nonvolatile flash memory and method of operating the same
#83Operation scheme with high work function gate and charge balancing for charge trapping non-volatile memory
#84Sector protection circuit for non-volatile semiconductor memory, sector protection method and non-volatile semiconductor memory
#85Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof
#86Circuit for preventing nonvolatile memory from over-erase
#87Semiconductor memory device having memory cells with floating gates and memory cell threshold voltage control method
#88Vertical device 4FEEPROM memory
#89Group erasing system for flash array with multiple sectors
#90Nonvolatile memory device including circuit formed of thin film transistors
#91PMOS memory cell
#92Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#93Flash memory device and method for recovering over-erased memory cells
#94Three dimensional semiconductor memory device and sub-block erasing methods