199653 ⎘
Erasable programmable read-only memories electrically programmable; Auxiliary circuits, e.g. for writing into memory; Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention; Arrangements for verifying correct programming or erasure Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
Sub-classes:ACCELERATING CONFIGURATION UPDATES FOR MEMORY DEVICES
#2MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM AND OPERATION METHOD THEREOF
#3MEMORY DEVICE FOR DETECTING FAIL CELL AND OPERATION METHOD THEREOF
#4Semiconductor device and erasing method
#5Open block management using storage charge loss margin checking
#6Accelerating configuration updates for memory devices
#7Method of detecting a not-open string (N/O string), converting target data, with a value that matches inhibit data, to be programmed to target memory cells in the N/O string, and programming the memory cells
#8Data arranging method, memory control circuit unit and memory storage device for flash memory for improving the performance of valid data merging operation
#9Programming of memory devices
#10Non-volatile memory device and operating method thereof
#11Non-volatile memory device, storage device, and programming method thereof for performing an erase detect operation
#12Programming of memory devices in response to programming voltages indicative of programming efficiency
#13Non-volatile memory device and operating method thereof for performing an erase detect operation
#14Programming of memory devices responsive to a stored representation of a programming voltage indicative of a programming efficiency
#15Semiconductor memory device
#16Memory system including semiconductor memory device and program method thereof
#17Method of operating a memory system having an erase control unit
#18Auto low current programming method without verify
#19Programming of memory devices
#20Non-volatile memory with linear hot-electron injection technique and strain gauge using the same
#21Minimal maximum-level programming
#22Efficient smart verify method for programming 3D non-volatile memory
#23Data writing method, and memory control circuit unit and memory storage apparatus using the same
#24Efficient smart verify method for programming 3D non-volatile memory
#25Non-volatile semiconductor memory device
#26Semiconductor memory device and method of operating the same
#27Method and system for reducing write-buffer capacities within memristor-based data-storage devices
#28Bit error rate based wear leveling for solid state drive memory
#29Non-volatile memory (NVM) that uses soft programming
#30Data writing method, and memory controller and memory storage apparatus using the same
#31Method, apparatus, and manufacture for flash memory adaptive algorithm
#32Bit error rate based wear leveling for solid state drive memory
#33Memory array and method for programming memory array
#34Nonvolatile memory device and program method thereof
#35Non-volatile memory and method with improved first pass programming
#36Nonvolatile memory and method for improved programming with reduced verify
#37Programming non-volatile memory with variable initial programming pulse
#38Memory apparatus and method for controlling erase operation of the same
#39Memory cell operation
#40Write-precompensation and variable write backoff
#41Semiconductor memory device and method of operating the same
#42PFET nonvolatile memory
#43Non-volatile memory device with program current clamp and related method
#44Method for programming a floating gate
#45Programming non-volatile memory with high resolution variable initial programming pulse
#46Soft program of a non-volatile memory block
#47Threshold detecting method and verify method of memory cells
#48Method of programming a semiconductor memory device
#49Flash memory device and system including the same
#50Programming non-volatile memory with high resolution variable initial programming pulse
#51Channel hot electron injection programming method and related device
#52VERIFY WHILE WRITE SCHEME FOR NON-VOLATILE MEMORY CELL
#53Memory cell operation
#54Non-volatile semiconductor memory device capable of preventing over-programming
#55Methods of programming semiconductor memory devices
#56Non-volatile memory and operation method thereof
#57Nonvolatile memory, verify method therefor, and semiconductor device using the nonvolatile memory
#58Flash memory device configured to reduce common source line noise, methods of operating same, and memory system incorporating same
#59SEMICONDUCTOR MEMORY DEVICE
#60Method for programming a floating gate
#61Erasing flash memory using adaptive drain and/or gate bias
#62Programming non-volatile memory with high resolution variable initial programming pulse
#63Programming non-volatile memory with variable initial programming pulse
#64Method and apparatus for programming auto shut-off
#65System and method for programming cells in non-volatile integrated memory devices
#66Nonvolatile semiconductor memory device
#67Circuit and system for programming a floating gate
#68Flash memory device and system including the same
#69Nonvolatile memory, verify method therefor, and semiconductor device using the nonvolatile memory
#70Semiconductor memory device
#71Nonvolatile semiconductor storage device and operation method thereof
#72Reading non-volatile storage with efficient setup
#73Operating method of multi-level memory cell
#74Methods for partitioned erase and erase verification in non-volatile memory to compensate for capacitive coupling effects
#75Nonvolatile memory devices that utilize dummy memory cells to improve data reliability in charge trap memory arrays
#76Method for performing operations by applying periodic voltage pulses to control gate of an ono memory cell
#77Rank modulation for flash memories
#78Memory device with charge trapping layer
#79Memory cell operation
#80Flash memory device and method of programming the same
#81Word line compensation in non-volatile memory erase operations
#82Method of programming memory device
#83Three cycle SONOS programming
#84Data processing system and nonvolatile memory
#85Method to prevent overreset
#86Hybrid non-volatile memory
#87Nonvolatile semiconductor storage device and operation method thereof
#88pFET nonvolatile memory
#89FLASH MEMORY DEVICE CAPABLE OF PREVENTING AN OVERERASE OF FLASH MEMORY CELLS AND ERASE METHOD THEREOF
#90Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
#91Erasing flash memory using adaptive drain and/or gate bias
#92Nonvolatile semiconductor memory device
#93Method for preventing over-erasing of unused column redundant memory cells in a flash memory having single-transistor memory cells
#94Method for partitioned erase and erase verification to compensate for capacitive coupling effects in non-volatile memory
#95Partitioned soft programming in non-volatile memory
#96Method and apparatus for adaptive programming of flash memory, flash memory devices, and systems including flash memory having adaptive programming capability
#97Concurrent programming and program verification of floating gate transistor
#98Program control circuit of flash memory device having MLC and method thereof
#99Non-volatile memory and method with bit line to bit line coupled compensation
#100Programming and erasing method for charge-trapping memory devices
#101Systems and methods for improved programming of flash based devices
#102Method of erasing an EEPROM device
#103Method of fabricating flash memory cell
#104Method of operating flash memory cell
#105Counteracting overtunneling in nonvolatile memory cells
#106Programming and erasing method for charge-trapping memory devices
#107System for reading non-volatile storage with efficient setup
#108Reading non-volatile storage with efficient setup
#109Data processing system and nonvolatile memory
#110Method, system and circuit for programming a non-volatile memory array
#111Use of data latches in multi-phase programming of non-volatile memories
#112Fabrication method of non-volatile memory
#113Erase method to reduce erase time and to prevent over-erase
#114Nonvolatile memory with program while program verify
#115Semiconductor integrated circuit device
#116Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#117Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#118Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#119Systems and methods for improved programming of flash based devices
#120Memory architecture with enhanced over-erase tolerant control gate scheme
#121Program control circuit of flash memory device having MLC and method thereof
#122System and method for programming cells in non-volatile integrated memory devices
#123Nonvolatile semiconductor memory device
#124Non-volatile memory, fabrication method thereof and operation method thereof
#125Non-volatile memory and method with bit line to bit line coupled compensation
#126Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
#127Erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells
#128Soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells
#129Systems for erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells
#130Use of data latches in multi-phase programming of non-volatile memories
#131Systems for soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells
#132Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
#133Method for operating a flash memory device
#134Control of voltages during erase and re-program operations of memory cells
#135Word line compensation in non-volatile memory erase operations
#136Systems for comprehensive erase verification in non-volatile memory
#137Faster programming of higher level states in multi-level cell flash memory
#138System and method for over erase reduction of nitride read only memory
#139High speed programming system with reduced over programming
#140Methods for accelerated erase operations in non-volatile memory devices and related devices
#141Systems for comprehensive erase verification in non-volatile memory
#142Comprehensive erase verification for non-volatile memory
#143Comprehensive erase verification for non-volatile memory
#144Semiconductor memory device and electric device with the same
#145Semiconductor device, reset control system and memory reset method
#146Method and system for a programming approach for a nonvolatile electronic device
#147Programming and erasing method for charge-trapping memory devices
#148Nonvolatile memory structure
#149Nonvolatile memory structure
#150Non-volatile memory device and erasing method therefor
#151Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
#152Flash memory cell and fabricating method thereof
#153Hybrid non-volatile memory
#154Selective erase method for flash memory
#155Semiconductor memory device and electric device with the same
#156Adaptive programming technique for a re-writable conductive memory device
#157System and method for over erase reduction of nitride read only memory
#158Comprehensive erase verification for non-volatile memory
#159Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof
#160Circuit for preventing nonvolatile memory from over-erase
#161Nonvolatile semiconductor memory device and method of programming in nonvolatile semiconductor memory device
#162Two-phase programming of a flash memory
#163Semiconductor memory device having memory cells with floating gates and memory cell threshold voltage control method
#164Nonvolatile memory, verify method therefor, and semiconductor device using the nonvolatile memory
#165Data writing method for semiconductor memory device and semiconductor memory device
#166Nonvolatile memory structure
#167Erase method in flash memory device
#168Programming method of flash memory device
#169Method, system and circuit for programming a non-volatile memory array
#170Method of over-erase prevention in a non-volatile memory device and related structure
#171Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
#172Non-volatile memory and method with bit line coupled compensation
#173System for erasing nonvolatile memory
#174PMOS memory cell
#175Method and apparatus for programming single-poly pFET-based nonvolatile memory cells
#176Semiconductor memory device and electric device with the same
#177Semiconductor device
#178Memory device with non-volatile reference memory cell trimming capabilities
#179Flash memory apparatus and data erasing method thereof
#180Prioritized memory scanning for data storage systems