METHOD FOR MANUFACTURING OPTOELECTRONIC DEVICES

Semiconductor substrate and method of manufacturing thereof

Method for manufacturing diamond substrate

METHOD FOR FLATTENING A SURFACE ON AN EPITAXIAL LATERAL GROWTH LAYER

Semiconductor substrate, semiconductor device, and method for forming semiconductor structure

High percentage silicon germanium graded buffer layers with lattice matched Ga(As-P) interlayers

Semiconductor structure comprising III-N material

Method of forming III-V on insulator structure on semiconductor substrate

III-V or II-VI compound semiconductor films on graphitic substrates

Method for printing wide bandgap semiconductor materials

Systems and methods of dislocation filtering for layer transfer

Single-crystal rare earth oxide grown on III-V compound

Fabrication of compound semiconductor structures

Method of forming III-V on insulator structure on semiconductor substrate

Nanostructured substrates for improved lift-off of III-V thin films

Buffer layers having composite structures

High-electron-mobility transistors with counter-doped dopant diffusion barrier

High-electron-mobility transistors with heterojunction dopant diffusion barrier

Pseudomorphic InGaAs on GaAs for gate-all-around transistors

Fabrication of compound semiconductor structures

Single-crystal rare earth oxide grown on III-V compound

Selective nanoscale growth of lattice mismatched materials

Buffer layers having composite structures

Method for removing native oxide and residue from a III-V group containing surface

Stress assisted wet and dry epitaxial lift off

Conversion of strain-inducing buffer to electrical insulator

Strained group IV channels

Compound finFET device including oxidized III-V fin isolator

III-V or II-VI compound semiconductor films on graphitic substrates

Method for forming group III/V conformal layers on silicon substrates

Utilization of angled trench for effective aspect ratio trapping of defects in strain-relaxed heteroepitaxy of semiconductor films

Type III-V and type IV semiconductor device formation

Method for reducing contact resistance in MOS

Method for removing native oxide and residue from a III-V group containing surface

Strained stacked nanosheet FETS and/or quantum well stacked nanosheet

Method for fabricating a semiconductor structure

Group III-V device with a selectively modified impurity concentration

GERMANIUM-CONTAINING SEMICONDUCTOR DEVICE AND METHOD OF FORMING

III-V semiconductor device having self-aligned contacts

Utilization of angled trench for effective aspect ratio trapping of defects in strain relaxed heteroepitaxy of semiconductor films

Hybrid III-V technology to support multiple supply voltages and off state currents on same chip

Multiple-threshold voltage devices and method of forming same

III-V semiconductor device having self-aligned contacts

Selective nanoscale growth of lattice mismatched materials

SEMICONDUCTOR WAFER, METHOD OF PRODUCING A SEMICONDUCTOR WAFER AND METHOD OF PRODUCING A COMPOSITE WAFER

Semiconductor device comprising epitaxially grown semiconductor material and an air gap

Group III-V device with a selectively modified impurity concentration

Group III-V device with a selectively reduced impurity concentration

Virtual substrates by having thick, highly relaxed metamorphic buffer layer structures by hydride vapor phase epitaxy

Selective epitaxial growth of semiconductor materials with reduced defects

REDUCING WAFER DISTORTION THROUGH A HIGH CTE LAYER

Reducing wafer distortion through a high CTE layer

Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby

Method for forming group III/V conformal layers on silicon substrates

III-V semiconductor structures and methods for forming the same

Selective epitaxial growth of semiconductor materials with reduced defects

Group III-V device structure having a selectively reduced impurity concentration

III-V compound crystal and semiconductor electronic circuit element

Reducing wafer distortion through a high CTE layer

Defect-free hetero-epitaxy of lattice mismatched semiconductors

Semiconductor nanocrystal, method of manufacture thereof and articles including the same

III-V semiconductor structures and methods for forming the same

Solar Cell Element, Color Sensor and Method of Manufacturing Light Emitting Element and Light Receiving Element

High-Quality Hetero-Epitaxy by Using Nano-Scale Epitaxy Technology

METHOD OF FORMING LED STRUCTURES

Method for manufacturing an III-V engineered substrate and the III-V engineered substrate thereof

Light emitting device and light emitting device package having the same

Selective epitaxial growth of semiconductor materials with reduced defects

SEMICONDUCTOR ELECTRONIC DEVICE AND PROCESS OF MANUFACTURING THE SAME

Method for epitaxial growth

III-V compound crystal and semiconductor electronic circuit element

Method of producing semiconductor optical device

Semiconductor member, manufacturing method thereof, and semiconductor device

Semiconductor device, semiconductor layer and production method thereof

Compound semiconductor substrate, epitaxial substrate, processes for producing compound semiconductor substrate, and epitaxial substrate

Semiconductor film manufacturing method and substrate manufacturing method

Semiconductor member, manufacturing method thereof, and semiconductor device

III-V and II-VI compounds as template materials for growing germanium containing film on silicon

Defect reduction in semiconductor materials

Method for depositing III-V semiconductor layers on a non-III-V substrate

III-V device structure with multiple threshold voltage

Method of removing threading dislocation defect from a fin feature of III-V group semiconductor material

Self-aligned and lateral-assembly method for integrating heterogeneous material structures on the same plane