207126 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof; Making masks on semiconductor bodies for further photolithographic processing not provided for in group or comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane Process specially adapted to improve the resolution of the mask
Semiconductor device
#1202AIR-GAP INTERCONNECT STRUCTURES WITH SELECTIVE CAP
#1203Method for forming fine pattern with a double exposure technology
#1204Method for Manufacturing Semiconductor Device
#1205Fin structure formation
#1206Method of forming fine pitch hardmask patterns and method of forming fine patterns of semiconductor device using the same
#1207Semiconductor device fabrication and dry develop process suitable for critical dimension tunability and profile control
#1208METHOD FOR FORMING PATTERN OF A SEMICONDUCTOR DEVICE
#1209Method for forming fine patterns of a semiconductor device
#1210Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
#1211Dry non-plasma treatment system and method of using
#1212MANUFACTURING PROCESS OF AN ORGANIC MASK FOR MICROELECTRONIC INDUSTRY
#1213Sub-lithographic feature patterning using self-aligned self-assembly polymers
#1214Etching method, plasma processing system and storage medium
#1215Topography based patterning
#1216Pitch reduction
#1217Masking techniques and templates for dense semiconductor fabrication
#1218Process for improving critical dimension uniformity of integrated circuit arrays
#1219Simplified pitch doubling process flow
#1220Simplified pitch doubling process flow
#1221Manufacturing method of semiconductor device
#1222Method for forming minute pattern and method for forming semiconductor memory device using the same
#1223Method for forming a semiconductor device
#1224Simultaneous selective polymer deposition and etch pitch doubling for sub 50nm line/space patterning
#1225Topography directed patterning
#1226Topography directed patterning
#1227Resist composition, method for forming resist pattern, and semiconductor device and method for manufacturing the same
#1228Layout and process to contact sub-lithographic structures
#1229Over-coating agent for forming fine patterns and a method of forming fine patterns using such agent
#1230Method of forming semiconductor device structures using hardmasks
#1231Trim process for critical dimension control for integrated circuits
#1232Manufacturing a semiconductive device using a controlled atomic layer removal process
#1233Dry etching method
#1234Method for fabricating semiconductor device
#1235Method for forming fine pattern of semiconductor device
#1236Method of making openings in a layer of a semiconductor device
#1237Method for forming fine pattern of semiconductor device
#1238Method for manufacturing micro structure
#1239Method of fabricating semiconductor device
#1240Device manufacturing method and computer program product
#1241CMOS gate structures fabricated by selective oxidation
#1242Method to align mask patterns
#1243Device manufacturing method and computer program product
#1244Reducing line edge roughness
#1245Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram
#1246Fin structure formation
#1247Methods for forming uniform lithographic features
#1248METHOD FOR ETCHING WITH HARDMASK
#1249Pitch reduced patterns relative to photolithography features
#1250Method for integrated circuit fabrication using pitch multiplication
#1251Method for manufacturing underlying pattern of semiconductor device
#1252Method of forming self-aligned double pattern
#1253Method for manufacturing semiconductor device
#1254Semiconductor device having an organic anti-reflective coating (ARC) and method therefor
#1255Self-aligned planar double-gate transistor structure
#1256Pitch reduced patterns relative to photolithography features
#1257Patterning method and field effect transistors
#1258Pitch reduced patterns relative to photolithography features
#1259Self-aligned pitch reduction
#1260Method of forming pattern using fine pitch hard mask
#1261Device with self aligned gaps for capacitance reduction
#1262Device with gaps for capacitance reduction
#1263Self-aligned pitch reduction
#1264Method for manufacturing semiconductor device
#1265Multiple deposition for integration of spacers in pitch multiplication process
#1266Semiconductor device fabrication method and semiconductor device
#1267Shrinking contact apertures through LPD oxide
#1268Method for forming patterns of semiconductor device
#1269Method for forming narrow structures in a semiconductor device
#1270Recursive spacer defined patterning
#1271Method of forming micro patterns in semiconductor devices
#1272Mandrel/trim alignment in SIT processing
#1273Methods for fabricating sub-resolution line space patterns
#1274Dense non-volatile memory array and method of fabrication
#1275Method and algorithm for random half pitched interconnect layout with constant spacing
#1276Method for processing a layered stack in the production of a semiconductor device
#1277Multiple deposition for integration of spacers in pitch multiplication process
#1278Method of forming pitch multipled contacts
#1279Pitch multiplication spacers and methods of forming the same
#1280Method of forming isolated features using pitch multiplication
#1281Method for manufacturing semiconductor device using polymer
#1282Dense non-volatile memory array and method of fabrication
#1283Method of manufacturing a memory device
#1284Method of producing a trench in a photo-resist on a III-V wafer and a compound wafer having a photo-resist including such a trench
#1285Manufacture method for micro structure
#1286Method of production pitch fractionizations in semiconductor technology
#1287Controlled geometry hardmask including subresolution elements
#1288Methods of fabricating a semiconductor device
#1289Method of fabricating a semiconductor device
#1290Plasma etching method and apparatus, control program and computer-readable storage medium
#1291Multiple mask process with etch mask stack
#1292Method and apparatus for adjusting feature size and position
#1293Transistor formation method using sidewall masks
#1294Critical dimension control for integrated circuits
#1295Masking methods
#1296Methods for increasing photo-alignment margins
#1297Structures with increased photo-alignment margins
#1298Methods for increasing photo-alignment margins
#1299Methods for forming arrays of small, closely spaced features
#1300Method for integrated circuit fabrication using pitch multiplication
#1301Method for integrated circuit fabrication using pitch multiplication
#1302Reticle alignment and overlay for multiple reticle process
#1303Method to align mask patterns
#1304Method of forming small pitch pattern using double spacers
#1305Method of forming pattern using fine pitch hard mask
#1306Method of manufacturing a semiconductor device
#1307Hard mask arrangement
#1308Techniques for the use of amorphous carbon (APF) for various etch and litho integration schemes
#1309Methods for increasing photo alignment margins
#1310Integrated circuit fabrication
#1311Integrated circuit fabrication
#1312Pitch reduced patterns relative to photolithography features
#1313Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus
#1314Deposition of permanent polymer structures for OLED fabrication
#1315Fine pattern forming method
#1316Process for producing sublithographic structures
#1317Method of manufacturing semiconductor device
#1318Patterning method for fabricating high resolution structures
#1319Method for fabricating etch mask and patterning process using the same
#1320Method for patterning fins and gates in a FinFET device using trimmed hard-mask capped with imaging layer
#1321Polymer spacer formation
#1322Reduction of etch mask feature critical dimensions
#1323Nanocircuit and self-correcting etching method for fabricating same
#1324Techniques for patterning features in semiconductor devices
#1325Side wall active pin memory and manufacturing method
#1326Method for manufacturing a small pin on integrated circuits or other devices
#1327Integrated circuit including sub-lithographic structures
#1328Oxidation sidewall image transfer patterning method
#1329Semiconductor device having improved contact hole structure and method for fabricating the same
#1330Method for manufacturing electronic circuits integrated on a semiconductor substrate
#1331Reduced mask count gate conductor definition
#1332Sub-lithographic imaging techniques and processes
#1333Method and system for etching a film stack
#1334Method for realizing a hosting structure of nanometric elements
#1335Method for patterning sub-lithographic features in semiconductor manufacturing
#1336Method for integrated circuit fabrication using pitch multiplication
#1337Critical dimension control for integrated circuits
#1338Methods for increasing photo alignment margins
#1339Method to align mask patterns
#1340Mask material conversion
#1341Method for producing a structure on the surface of a substrate
#1342Reduced feature-size memory devices and methods for fabricating the same
#1343Method of reducing pattern pitch in integrated circuits
#1344Method for forming controlled geometry hardmasks including subresolution elements
#1345Method for preventing striation at a sidewall of an opening of a resist during an etching process
#1346Resist pattern thickening material and process for forming the same, and semiconductor device and process for manufacturing the same
#1347Method of pitch dimension shrinkage
#1348Methods and structures for protecting one area while processing another area on a chip
#1349Over-coating agent for forming fine patterns and a method of forming fine patterns using such agent
#1350Semiconductor device, electro-optic device, integrated circuit, and electronic apparatus
#1351Mask pattern for semiconductor device fabrication, method of forming the same, and method of fabricating finely patterned semiconductor device
#1352Method for making a semiconductor device using treated photoresist as an implant mask
#1353Method for creating a pattern in a material and semiconductor structure processed therewith
#1354Approach to improve line end shortening including simultaneous trimming of photosensitive layer and hardmask
#1355Method of making a semiconductor device using treated photoresist
#1356Semiconductor device having an organic anti-reflective coating (ARC) and method therefor
#1357Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme
#1358Method of trimming technology
#1359Solvent vapor-assisted plasticization of photoresist films to achieve critical dimension reduction during temperature reflow
#1360Semiconductor device having improved contact hole structure and method for fabricating the same
#1361Method for making a semiconductor device that includes a metal gate electrode
#1362Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus
#1363Patterned microelectronic mask layer formation method employing multiple feed-forward linewidth measurement
#1364Method for forming narrow trench structures
#1365Methods for using a silylation technique to reduce cell pitch in semiconductor devices
#1366Method for simultaneous patterning of features with nanometer scales gaps
#1367Method to pattern small features by using a re-flowable hard mask
#1368Nanocircuit and self-correcting etching method for fabricating same
#1369Vertically wired integrated circuit and method of fabrication
#1370Self-aligned planar double-gate process by self-aligned oxidation
#1371Techniques for patterning features in semiconductor devices
#1372Masking methods
#1373Resist pattern thickening material, process for forming resist pattern, and process for manufacturing semiconductor device
#1374Semiconductor device having an organic anti-reflective coating (ARC) and method therefor
#1375Methods of forming nanostructures utilizing self-assembled nucleic acids
#1376Self-aligned two-time forming method capable of preventing sidewalls from being deformed
#1377Method of manufacturing semiconductor structure
#1378Methods of forming a pattern
#1379SADP method with mandrel undercut spacer portion for mandrel space dimension control
#1380Patterning method
#1381Anodic aluminum oxide as hard mask for plasma etching
#1382Method of manufacturing a semiconductor structure
#1383Semiconductor devices including self-aligned active regions for planar transistor architecture
#1384Method of forming patterned structure
#1385Self-aligned double patterning method
#1386Method for manufacturing high density magnetic tunnel junction devices using photolithographic VIAS and chemically guided block copolymer self assembly
#1387Method for manufacturing a chemical guidance pattern for block copolymer self assembly from photolithographically defined topographic block copolymer guided self assembly
#1388Method for preparing a semiconductor structure having second line patterns and third line patterns formed over first line patterns
#1389Fabricating semiconductor devices having patterns with different feature sizes
#1390Method for preparing a patterned target layer
#1391Methods of forming features on integrated circuit products
#1392Method of making self-aligned continuity cuts in mandrel and non-mandrel metal lines
#1393Method of forming fine island patterns of semiconductor devices
#1394Method for preparing semiconductor structures
#1395Integration fill technique
#1396Self-aligned block patterning with density assist pattern
#1397Method of fabricating fin structure
#1398Methods for providing variable feature widths in a self-aligned spacer-mask patterning process
#1399Self-aligned non-mandrel cut formation for tone inversion
#1400Method of forming mandrel and non-mandrel metal lines having variable widths
#1401Method of making self-aligned continuity cuts in mandrel and non-mandrel metal lines
#1402Semiconductor methods and devices
#1403Self-aligned double spacer patterning process
#1404Method and structure for cut material selection
#1405Method of forming patterned mask layer
#1406Devices and methods of forming SADP on SRAM and SAQP on logic
#1407Method for forming a patterned layer
#1408Process monitoring for gate cut mask
#1409High density patterned material on integrated circuits
#1410Via patterning using multiple photo multiple etch
#1411Method of manufacturing a static random access memory
#1412Methods for fabricating integrated circuits using self-aligned quadruple patterning
#1413Mask shrink layer for high aspect ratio dielectric etch
#1414Contact hole formation methods
#1415Tone inverted directed self-assembly (DSA) fin patterning
#1416Apparatus and methods for spacer deposition and selective removal in an advanced patterning process
#1417Lateral oxidation process flows
#1418Method of manufacturing semiconductor device
#1419Methods of fabricating interconnection structures
#1420Wide and narrow patterning using common process
#1421Metal routing in advanced process technologies
#1422Manufacturing method of semiconductor structure
#1423Method of eliminating a lithography operation