207126 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof; Making masks on semiconductor bodies for further photolithographic processing not provided for in group or comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane Process specially adapted to improve the resolution of the mask
Integrated circuit fabrication
#902Lithographic method and arrangement for manufacturing a spacer
#903Superfine-patterned mask, method for production thereof, and method employing the same for forming superfine-pattern
#904Method of forming a contact hole
#905Selective self-aligned double patterning of regions in an integrated circuit device
#906Methods of forming patterns on substrates
#907Methods for isolating portions of a loop of pitch-multiplied material and related structures
#908Methods of forming nanodots using spacer patterning techniques and structures formed thereby
#909Method of making small geometry features
#910Pitch multiplication spacers and methods of forming the same
#911Field effect transistors having a double gate structure
#912Patterning method and integrated circuit structure
#913Method of forming patterns of semiconductor device
#914Method for fabricating semiconductor device using a double patterning process
#915Method of fabricating semiconductor device
#916Patterning method
#917Method for forming pattern of semiconductor device
#918Semiconductor device having integral structure of contact pad and conductive line
#919Pitch multiplied mask patterns for isolated features
#920Methods of forming patterns for semiconductor devices
#921Dry non-plasma treatment system and method of using
#922Methods of forming patterns
#923Methods of forming patterns in semiconductor devices
#924Spacer process for on pitch contacts and related structures
#925Method of forming patterns for semiconductor device
#926Manufacturing method of semiconductor device
#927Substrate processing with shrink etching step
#928Simplified pitch doubling process flow
#929Pitch reduced patterns relative to photolithography features
#930Patterns of semiconductor device and method of forming the same
#931Fin and finFET formation by angled ion implantation
#932Method for integrated circuit fabrication using pitch multiplication
#933Cut first methodology for double exposure double etch integration
#934Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same
#935Semiconductor device fabrication method using multiple mask patterns
#936Semiconductor device fabrication method and semiconductor device
#937Methods for increased array feature density
#938Topography based patterning
#939Multi-material hard mask or prepatterned layer for use with multi-patterning photolithography
#940Method of manufacturing a semiconductor device
#941METHOD OF FORMING SEMICONDUCTOR DEVICES EMPLOYING DOUBLE PATTERNING
#942Method for reducing tip-to-tip spacing between lines
#943Trim process for critical dimension control for integrated circuits
#944Substrate processing method
#945Fine pattern forming method
#946Spin-on spacer materials for double- and triple-patterning lithography
#947Method for forming fine pattern using quadruple patterning in semiconductor device
#948Resist feature and removable spacer pitch doubling patterning method for pillar structures
#949Method of forming fine pattern using block copolymer
#950METHOD FOR FORMING FINE PATTERNS IN A SEMICONDUCTOR DEVICE
#951Method, program and system for processing substrate
#952Semiconductor devices having narrow conductive line patterns and related methods of forming such semiconductor devices
#953Semiconductor devices including patterns
#954Memory device
#955Method of manufacturing semiconductor device
#956Methods of fabricating substrates
#957Methods of fabricating substrates
#958Methods of fabricating substrates
#959Self aligned narrow storage elements for advanced memory device
#960Methods of forming a masking pattern for integrated circuits
#961METHOD OF FABRICATING SEMICONDUCTOR DEVICE UNCONSTRAINED BY OPTICAL LIMIT AND APPARATUS OF FABRICATING THE SEMICONDUCTOR DEVICE
#962Methods of utilizing block copolymer to form patterns
#963Method of manufacturing semiconductor device
#964Method for forming micro-pattern in semiconductor device
#965Semiconductor device manufacturing method
#966METHOD OF FORMING FINE PATTERNS USING MULTIPLE SPACER PATTERNS
#967COMPOSITION FOR FORMING MICROPATTERN AND METHOD FOR FORMING MICROPATTERN USING THE SAME
#968Method for forming high density patterns
#969Efficient pitch multiplication process
#970System and method for self-aligned dual patterning
#971Method for forming pattern of semiconductor device
#972Methods of forming patterns utilizing lithography and spacers
#973Pitch reduced patterns relative to photolithography features
#974Method to align mask patterns
#975Methods of forming fine patterns in the fabrication of semiconductor devices
#976PATTERNING PROCESS
#977Method of making sub-resolution pillar structures using undercutting technique
#978Over-coating agent for forming fine patterns and a method of forming fine patterns using such agent
#979Mask pattern forming method, fine pattern forming method, and film deposition apparatus
#980Method for fabricating device pattern
#981METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
#982METHOD OF FORMING PATTERN IN SEMICONDUCTOR DEVICE
#983Process of patterning small scale devices
#984Semiconductor device and method of producing the same
#985Substrate processing method
#986Methods for Manufacturing a Structure on a Substrate and Intermediate Product
#987Method of manufacturing semiconductor device
#988Manufacturing method of semiconductor devices
#989Method of fabricating semiconductor device and semiconductor device
#990Method for forming pattern, and material for forming coating film
#991Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
#992Lithography for pitch reduction
#993METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#994Method of forming patterns of semiconductor device
#995Substrate processing method
#996Method for patterning a semiconductor device
#997Within-sequence metrology based process tuning for adaptive self-aligned double patterning
#998Process for producing sublithographic structures
#999Pattern-forming method, metal oxide film-forming material and method for using the metal oxide film-forming material
#1000Semiconductor device
#1001Triangle two dimensional complementary patterning of pillars
#1002MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
#1003Method for forming fine patterns of semiconductor device
#1004Method for forming fine pitch structures
#1005Methods of forming fine patterns in the fabrication of semiconductor devices
#1006METHOD OF DOUBLE PATTERNING USING SACRIFICIAL STRUCTURE
#1007SELF-ALIGNED DUAL PATTERNING INTEGRATION SCHEME
#1008Method for manufacturing semiconductor device
#1009Method of manufacturing a semiconductor device
#1010PATTERN FORMING METHOD
#1011METHOD FOR FORMING A PATTERN OF A SEMICONDUCTOR DEVICE
#1012Forming method of etching mask, control program and program storage medium
#1013Method of forming minute patterns in semiconductor device using double patterning
#1014METHOD FOR CRITICAL DIMENSION SHRINK USING CONFORMAL PECVD FILMS
#1015Method of fabricating semiconductor device
#1016Method of forming micro pattern in semiconductor device
#1017Dry etching method
#1018Method of forming fine patterns of semiconductor device by using double patterning process which uses acid diffusion
#1019Method of Forming Pattern of Semiconductor Device
#1020Method for fabricating self-aligned complementary pillar structures and wiring
#1021Method for pitch reduction in integrated circuit fabrication
#1022Method for forming fine pattern by spacer patterning technology
#1023Methods for pitch reduction
#1024METHOD FOR MAKING VERY SMALL ISOLATED DOTS ON SUBSTRATES
#1025Methods of improving long range order in self-assembly of block copolymer films with ionic liquids
#1026Method for selectively modifying spacing between pitch multiplied structures
#1027Thermal anneal of block copolymer films with top interface constrained to wet both blocks with equal preference
#1028Lithography resolution improving method
#1029Method of Forming Mask Pattern
#1030Method of fabricating semiconductor device
#1031Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus
#1032METHOD OF FORMING INTERCONNECTS
#1033Double patterning process
#1034PATTERN FORMING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS
#1035Dual damascene metal interconnect structure having a self-aligned via
#1036METHOD OF TRIMMING A HARD MASK LAYER, METHOD FOR FABRICATING A GATE IN A MOS TRANSISTOR, AND A STACK FOR FABRICATING A GATE IN A MOS TRANSISTOR
#1037Method for etching integrated circuit structure
#1038One-dimensional arrays of block copolymer cylinders and applications thereof
#1039Sub-lithographic dimensioned air gap formation and related structure
#1040Feature patterning methods
#1041Semiconductor device and manufacturing method thereof
#1042Method of double patterning, method of processing a plurality of semiconductor wafers and semiconductor device
#1043MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
#1044HARDMASK OPEN PROCESS WITH ENHANCED CD SPACE SHRINK AND REDUCTION
#1045On-track process for patterning hardmask by multiple dark field exposures
#1046Method of forming a pattern of a semiconductor device
#1047Method of forming a contact hole and method of manufacturing a semiconductor device having the same
#1048METHOD OF FORMING PATTERNS OF SEMICONDUCTOR DEVICE
#1049Method of fine patterning semiconductor device
#1050Method of forming a micro pattern of a semiconductor device
#1051Method of forming micro pattern of semiconductor device
#1052Method for forming pattern of semiconductor device
#1053Double patterning with single hard mask
#1054METHOD OF FORMING A METAL LINE OF A SEMICONDUCTOR DEVICE
#1055Simplified double mask patterning system
#1056ETCH WITH HIGH ETCH RATE RESIST MASK
#1057Method for manufacturing a semiconductor device
#1058Method of fine patterning semiconductor device
#1059Methods for isolating portions of a loop of pitch-multiplied material and related structures
#1060Method for forming high density patterns
#1061Lithographic method
#1062Method of eliminating a lithography operation
#1063Line edge roughness reduction and double patterning
#1064Double patterning strategy for contact hole and trench
#1065Hard mask patterns of a semiconductor device and a method for forming the same
#1066Apparatus for providing device with gaps for capacitance reduction
#1067Process for improving critical dimension uniformity of integrated circuit arrays
#1068Method for manufacturing semiconductor device
#1069Semiconductor Devices and Method of Fabricating the Same
#1070Over-coating agent for forming fine patterns and a method of forming fine patterns using such agent
#1071Method of fabricating a flash memory device
#1072Method of forming pattern using fine pitch hard mask
#1073Method for forming fine pattern in semiconductor device
#1074SELF-ASSEMBLED MATERIAL PATTERN TRANSFER CONTRAST ENHANCEMENT
#1075Spacer process for on pitch contacts and related structures
#1076Frequency doubling using a photo-resist template mask
#1077Method for forming patterns in semiconductor memory device
#1078Method of forming micro pattern of semiconductor device
#1079Split charge storage node outer spacer process
#1080Method of fabricating semiconductor device with reduced pitch
#1081METHODS FOR FORMING NESTED AND ISOLATED LINES IN SEMICONDUCTOR DEVICES
#1082Patterning process
#1083Method for Manufacturing a Structure, Semiconductor Device and Structure on a Substrate
#1084Hole pattern forming method and semiconductor device manufacturing method
#1085Pattern formation method
#1086METHODS AND APPARATUS FOR COST-EFFECTIVELY INCREASING FEATURE DENSITY USING A MASK SHRINKING PROCESS WITH DOUBLE PATTERNING
#1087METHOD OF MINIMIZING VIA SIDEWALL DAMAGES DURING DUAL DAMASCENE TRENCH REACTIVE ION ETCHING IN A VIA FIRST SCHEME
#1088Manufacturing method, manufacturing apparatus, control program and program recording medium of semiconductor device
#1089Method for forming a pattern of a semiconductor device
#1090Method of fabricating a semiconductor device
#1091METHOD FOR FORMING MICROPATTERNS IN SEMICONDUCTOR DEVICE
#1092Method of fabricating semiconductor device
#1093Method of fabricating integrated circuit with small pitch
#1094Method of fabricating an integrated circuit
#1095Mask trimming
#1096METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
#1097Methods for forming patterns
#1098Methods for forming ultra thin structures on a substrate
#1099Methods for device fabrication using pitch reduction
#1100Semiconductor structures including tight pitch contacts and methods to form same
#1101Method for manufacturing semiconductor device
#1102Nanometric device with a hosting structure of nanometric elements
#1103SELF-ALIGNED PILLAR PATTERNING USING MULTIPLE SPACER MASKS
#1104Method for forming fine pattern of semiconductor device
#1105Method for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern
#1106Device with self aligned gaps for capacitance reduction
#1107Method for forming fine pattern of semiconductor device
#1108Method for forming fine pattern of semiconductor device
#1109Frequency doubling using spacer mask
#1110Pitch multiplication using self-assembling materials
#1111Semiconductor device manufacturing method
#1112Double patterning with a double layer cap on carbonaceous hardmask
#1113Electronic device manufacture
#1114Methods for forming arrays of small, closely spaced features
#1115CMOS gate structures fabricated by selective oxidation
#1116Method of forming pattern of semiconductor device
#1117Semiconductor device manufacturing methods
#1118Self aligned narrow storage elements for advanced memory device
#1119METHOD OF FORMING A HARD MASK PATTERN IN A SEMICONDUCTOR DEVICE
#1120Forming fine pattern of semiconductor device using three mask layers and CMP of spin-on carbon layer
#1121METHOD OF FORMING MICRO PATTERN OF SEMICONDUCTOR DEVICE
#1122Methods and structures for protecting one area while processing another area on a chip
#1123Etch process with controlled critical dimension shrink
#1124Multiple exposure lithography method incorporating intermediate layer patterning
#1125Method for adjusting feature size and position
#1126Method of forming a contact hole
#1127Self-aligned planar double-gate transistor structure
#1128SEMICONDUCTOR DEVICE HAVING STRUCTURE WITH SUB-LITHOGRAPHY DIMENSIONS
#1129Method for forming fine patterns in semiconductor device
#1130Method of forming micro pattern in semiconductor device
#1131Method for forming fine patterns using etching slope of hard mask layer in semiconductor device
#1132Self-aligned contact frequency doubling technology for memory and logic device applications
#1133Integrated circuit fabrication
#1134Methods of forming a semiconductor device
#1135Method of forming fine patterns of semiconductor devices using double patterning
#1136Sidewall image transfer processes for forming multiple line-widths
#1137Method of fabricating a semiconductor device comprising high and low density patterned contacts
#1138Method for producing a structure on the surface of a substrate
#1139Method of forming contact hole of semiconductor device
#1140Method of forming fine metal patterns for a semiconductor device using a damascene process
#1141Method of fabricating a semiconductor device
#1142Methods of manufacturing semiconductor device
#1143Method for forming mask for using dry-etching and method for forming fine structure pattern
#1144Method of forming fine patterns of semiconductor device using double patterning
#1145Device component forming method with a trim step prior to sidewall image transfer (SIT) processing
#1146Techniques for Patterning Features in Semiconductor Devices
#1147Sub-lithographic interconnect patterning using self-assembling polymers
#1148Semiconductor Device with Reduced Structural Pitch and Method of Making the Same
#1149Sub-lithographic gate length transistor using self-assembling polymers
#1150Methods for fabricating semiconductor structures
#1151Method of forming semiconductor device
#1152Method for forming a fine pattern in a semiconductor
#1153Method of trimming a hard mask layer, method for fabricating a gate in a MOS transistor, and a stack for fabricating a gate in a MOS transistor
#1154Method for forming fine pattern in semiconductor device
#1155Method for manufacturing semiconductor device
#1156Semiconductor device and method for forming pattern in the same
#1157Semiconductor device and method for forming pattern in the same
#1158Method of manufacturing semiconductor device
#1159Semiconductor device and method for forming a pattern in the same with double exposure technology
#1160Method for patterning a semiconductor device
#1161Multiple deposition for integration of spacers in pitch multiplication process
#1162Method for forming a semiconductor structure
#1163Layout and process to contact sub-lithographic structures
#1164Method for forming hard mask patterns having a fine pitch and method for forming a semiconductor device using the same
#1165METHOD FOR FORMING MICRO-PATTERN IN A SEMICONDUCTOR DEVICE
#1166Method for forming fine patterns of a semiconductor device using a double patterning process
#1167Methods to reduce the critical dimension of semiconductor devices
#1168Method of forming fine patterns using double patterning process
#1169Post-lithography misalignment correction with shadow effect for multiple patterning
#1170Sub-lithographic gate length transistor using self-assembling polymers
#1171Fabrication method of electronic device
#1172Sub-lithographic nano interconnect structures, and method for forming same
#1173Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same
#1174Method for forming fine patterns of a semiconductor device using double patterning
#1175Method of forming fine contact hole and method of fabricating semiconductor device using block copolymers
#1176METHOD OF FORMING LITHOGRAPHIC AND SUB-LITHOGRAPHIC DIMENSIONED STRUCTURES
#1177Methods of forming a semiconductor device that allow patterns in different regions that have different pitches to be connected
#1178Method of fabricating semiconductor device
#1179Sub-lithographic local interconnects, and methods for forming same
#1180De-fluoridation process
#1181Mask for forming fine pattern and method of forming the same
#1182METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#1183Method of forming pad patterns using self-align double patterning method, pad pattern layout formed using the same, and method of forming contact holes using self-align double patterning method
#1184Method of forming hardmask pattern of semiconductor device
#1185Method for double patterning a developable anti-reflective coating
#1186Method for forming fine pattern of semiconductor device
#1187Method of forming a fine pattern
#1188Methods of Forming Fine Patterns In Integrated Circuits Using Atomic Layer Deposition
#1189Resist pattern thickening material, method for forming resist pattern, semiconductor device and method for manufacturing the same
#1190Efficient pitch multiplication process
#1191Method of manufacturing flash memory device
#1192Method for forming a fine pattern of a semiconductor device
#1193Method for fabricating a contact hole
#1194Method for Processing a Structure of a Semiconductor Component, and Structure in a Semiconductor Component
#1195Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
#1196Self-aligned spatial frequency doubling
#1197SEMICONDUCTOR DEVICE HAVING FINE PATTERN WIRING LINES INTEGRALLY FORMED WITH CONTACT PLUG AND METHOD OF MANUFACTURING SAME
#1198Semiconductor device and method for manufacturing the same
#1199Method and material for forming a double exposure lithography pattern
#1200Method of forming a mask pattern