ClassID:

207235

H01L21/3228 - CPC Classification

Classification description:

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AB compounds with or without impurities, e.g. doping materials; Treatment of semiconductor bodies using processes or apparatus not provided for in groups  -  to modify their internal properties, e.g. to produce internal imperfections of AB compounds, e.g. to make them semi-insulating

Recent Application in this class:
#1
20250338529
2025-10-30

METHOD FOR MAKING DEPLETION-MODE HIGH-ELECTRON-MOBILITY TRANSISTOR

#2
20250324643
2025-10-16

GAN HEMT EPITAXIAL WAFER BASED ON ALN THICK FILM AND MANUFACTURING METHOD OF THE SAME

#3
20230378003
2023-11-23

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES

#4
20230064487
2023-03-02

Method for manufacturing semiconductor device

#5
20220344500
2022-10-27

Gallium Nitride high-electron mobility transistors with p-type layers and process for making the same

#6
20210217670
2021-07-15

Method of manufacturing semiconductor devices

#7
20210104415
2021-04-08

Defect reduction of semiconductor layers and semiconductor devices by anneal and related methods

#8
20200373462
2020-11-26

Control of p-contact resistance in a semiconductor light emitting device

#9
20200161142
2020-05-21

Defect reduction of semiconductor layers and semiconductor devices by anneal and related methods

#10
20190279869
2019-09-12

Method for making a semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice

#11
20190279868
2019-09-12

Semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice

#12
20180294379
2018-10-11

CONTROL OF P-CONTACT RESISTANCE IN A SEMICONDUCTOR LIGHT EMITTING DEVICE

#13
20180166561
2018-06-14

Contact structure and extension formation for III-V nFET

#14
20180061968
2018-03-01

Contact structure and extension formation for III-V nFET

#15
20170373176
2017-12-28

Gallium nitride high-electron mobility transistors with p-type layers and process for making the same

#16
20170170025
2017-06-15

Selective, electrochemical etching of a semiconductor

#17
20170077225
2017-03-16

Method for treating a gallium nitride layer comprising dislocations

#18
20170062592
2017-03-02

Contact structure and extension formation for III-V nFET

#19
20170062215
2017-03-02

Contact structure and extension formation for III-V nFET

#20
20170040181
2017-02-09

Semiconductor device and manufacturing method thereof

#21
20170025576
2017-01-26

Control of P-contact resistance in a semiconductor light emitting device

#22
20160343585
2016-11-24

Contact structure and extension formation for III-V nFET

#23
20160329211
2016-11-10

Selective dopant junction for a group III-V semiconductor device

#24
20160225641
2016-08-04

DEFECT REDUCTION IN III-V SEMICONDUCTOR EPITAXY THROUGH CAPPED HIGH TEMPERATURE ANNEALING

#25
20160172450
2016-06-16

Semiconductor device and method of fabricating the same

#26
20160118267
2016-04-28

Method for fabricating nitride semiconductor device with silicon layer

#27
20160053404
2016-02-25

CONTROLLABLE OXYGEN CONCENTRATION IN SEMICONDUCTOR SUBSTRATE

#28
20160005623
2016-01-07

METHOD FOR PURIFYING METALLURGICAL SILICON

#29
20150348773
2015-12-03

Aluminum-nitride buffer and active layers by physical vapor deposition

#30
20150340563
2015-11-26

Control of P-contact resistance in a semiconductor light emitting device

#31
20150325682
2015-11-12

Planar semiconductor growth on III-V material

#32
20150108617
2015-04-23

Method for chemically passivating a surface of a product made of a III-V semiconductor material and the product obtained by such a method

#33
20150064881
2015-03-05

Method for treating a gallium nitride layer comprising dislocations

#34
20150061088
2015-03-05

Semiconductor device and method of fabricating the same

#35
20150044825
2015-02-12

Compound semiconductor device and method of manufacturing the same

#36
20150028457
2015-01-29

EPITAXIAL SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

#37
20120032188
2012-02-09

Compound semiconductor device and method of manufacturing the same

#38
20120021597
2012-01-26

Method for fabricating semiconductor device

#39
20110293890
2011-12-01

Low etch pit density (EPD) semi-insulating III-V wafers

#40
20110215331
2011-09-08

Semiconductor device and manufacturing method thereof

#41
20110215325
2011-09-08

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

#42
20110089538
2011-04-21

LOW ETCH PIT DENSITY (EPD) SEMI-INSULATING III-V WAFERS

#43
20100018462
2010-01-28

Method for oxidizing a layer, and associated holding devices for a substrate

#44
20100001288
2010-01-07

Low Etch Pit Density (EPD) Semi-Insulating GaAs Wafers

#45
20090273010
2009-11-05

Removal of impurities from semiconductor device layers

#46
20090230513
2009-09-17

Compound semiconductor substrate and control for electrical property thereof

#47
20090162948
2009-06-25

Method for eliminating defects from semiconductor materials

#48
20080305560
2008-12-11

Method for eliminating defects from semiconductor materials

#49
20080280427
2008-11-13

Low etch pit density (EPD) semi-insulating GaAs wafers

#50
20060057858
2006-03-16

Method for oxidizing a layer, and associated holding devices for a substrate

#51
20050130396
2005-06-16

Method for activating P-type semiconductor layer

#52
15723802
2018-07-24

Semiconductor devices and methods for manufacturing the same