207468 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture of specific parts of devices defined in group; Making of isolation regions between components; Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#2PUNCH THROUGH LEAKAGE CONTROL FOR SEMICONDUCTOR STRUCTURES
#3SEMICONDUCTOR MEMORY DEVICE
#4TERMINATION STRUCTURE FOR A SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
#5METHOD OF FABRICATING OXIDE FILM WITH UNIFORM THICKNESS
#6ISOLATION STRUCTURE FOR IC WITH EPI REGIONS SHARING THE SAME TANK
#7DEVICE WITH ISOLATION STRUCTURES
#8METHODS FOR MAKING SEMICONDUCTOR TRANSISTOR DEVICES WITH RECESSED SUPERLATTICE OVER WELL REGIONS
#9MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
#10THREE-DIMENSIONAL MEMORY DEVICE AND METHOD
#11Semiconductor Structure And Method of Making The Same
#12SOURCE/DRAIN EPITAXIAL LAYER PROFILE
#13METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#14MERGED TRENCHES SURROUNDED BY WIDER TRENCH FOR ISOLATING SEMICONDUCTOR DEVICES
#15REDUCED ESR IN TRENCH CAPACITOR
#16SEMICONDUCTOR DEVICE WITH TRENCH STRUCTURES AND METHOD FOR MANUFACTURING SAME
#17Manufacturing method of semiconductor structure
#18SEMICONDUCTOR DEVICES
#19Semiconductor device with increased isolation breakdown voltage
#20Mechanism for finFET well doping
#21SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING OF THE SAME
#22Semiconductor device having deep trench structure and method of manufacturing thereof
#23Method for manufacturing semiconductor device
#24Method of manufacturing semiconductor structure
#25Semiconductor structure and manufacturing method thereof
#26Reduced ESR in trench capacitor
#27Isolation structure for IC with epi regions sharing the same tank
#28ELECTRODE STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MANUFACTURING METHOD OF ELECTRODE STRUCTURE
#29Source/drain epitaxial layer profile
#30Three-dimensional memory device and method
#31SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
#32METHOD FOR MANUFACTURING A SEMICONDUCTOR MEMORY DEVICE
#33Trench insulation structure with enlarged electrically conductive side wall
#34Semiconductor device having deep trench structure and method of manufacturing thereof
#35SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF
#36Method for forming semiconductor structure
#37Semiconductor storage device
#38Deep trench isolation with segmented deep trench
#39Method of fabricating semiconductor structure
#40METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE
#41Semiconductor device including trench isolation layer and method of forming the same
#42Semiconductor structure and manufacturing method thereof
#43METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
#44Three-dimensional memory device and method
#45Mechanism for FinFET well doping
#46Method for fabricating a semiconductor device
#47TRANSISTOR DEVICE WITH SINKER CONTACTS AND METHODS FOR MANUFACTURING THE SAME
#48Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
#49Method for passivating full front-side deep trench isolation structure
#50Semiconductor structure and forming method thereof
#51Masking a zone at the edge of a donor substrate during an ion implantation step
#52Semiconductor structure and fabrication method thereof
#53Multi-depth regions of high resistivity in a semiconductor substrate
#54Semiconductor device having deep trench structure and method of manufacturing thereof
#55Structures for improving radiation hardness and eliminating latch-up in integrated circuits
#56Lateral double-diffused metal oxide semiconductor component and manufacturing method therefor
#57Methods and apparatuses including a boundary of a well beneath an active area of a tap
#58ELECTRONIC CIRCUIT COMPRISING ELECTRICAL INSULATION TRENCHES
#59Source/drain epitaxial layer profile
#60Trench insulation structure with enlarged electrically conductive side wall
#61Semiconductor device including trench isolation layer and method of forming the same
#62DOPED STI TO REDUCE SOURCE/DRAIN DIFFUSION FOR GERMANIUM NMOS TRANSISTORS
#63Semiconductor device having deep trench structure and method of manufacturing thereof
#64SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#65Semiconductor structure and method of manufacturing the same
#66Method of fabricating image sensor
#67Structures for improving radiation hardness and eliminating latch-up in integrated circuits
#68Forming doped regions in semiconductor strips
#69Manufacturing method of semiconductor structure
#70Semiconductor device including a functional layer and a method of fabricating the same
#71Semiconductor structure including isolations
#72Methods and apparatuses including a boundary of a well beneath an active area of a tap
#73Semiconductor device manufacturing method and semiconductor device
#74Trench isolation interfaces
#75Isolation structure for IC with epi regions sharing the same tank
#76Source/drain epitaxial layer profile
#77Device with improved shallow trench isolation structure
#78Homogeneous densification of fill layers for controlled reveal of vertical fins
#79System and method for widening fin widths for small pitch FinFET devices
#80Semiconductor device
#81Electrical isolation in photonic integrated circuits
#82Method of manufacturing memory device
#83Mechanism for FinFET well doping
#84Forming doped regions in semiconductor strips
#85Trench isolation interfaces
#86Semiconductor devices and methods of fabricating the same
#87Semiconductor device and method of manufacturing same
#88Semiconductor device with two-part insulation structure within non-active region
#89Homogeneous densification of fill layers for controlled reveal of vertical fins
#90Semiconductor structure and method of manufacturing the same
#91Semiconductor structure including isolations and method for manufacturing the same
#92Semiconductor device and method for manufacturing the same
#93Sinker to buried layer connection region for narrow deep trenches
#94Method for making a semiconductor device including non-monocrystalline stringer adjacent a superlattice-sti interface
#95Charge storage cell and method of manufacturing a charge storage cell
#96Integrated circuit and manufacturing method thereof
#97Semiconductor structure and manufacturing method thereof
#98Semiconductor device having etching control layer in substrate and method of fabricating the same
#99Trench isolation interfaces
#100Method of forming oxide layer
#101Anneal after trench sidewall implant to reduce defects
#102System and method for widening fin widths for small pitch FinFET devices
#103Transistor device with sinker contacts and methods for manufacturing the same
#104Stress memorization technique for strain coupling enhancement in bulk FINFET device
#105Method for fabricating semiconductor device
#106Isolation structure for IC with epi regions sharing the same tank
#107Charge storage cell and method of manufacturing a charge storage cell
#108Self-aligned trench isolation in integrated circuits
#109Forming doped regions in semiconductor strips
#110Stress memorization technique for strain coupling enhancement in bulk finFET device
#111Mechanisms for forming FinFETs with different fin heights
#112Reverse-blocking IGBT having a reverse-blocking edge termination structure
#113Semiconductor device and manufacturing method therefor
#114Isolation structure of fin field effect transistor
#115System and method for widening Fin widths for small pitch FinFET devices
#116Method for manufacturing semiconductor device with trench isolation structure having plural oxide films
#117Implant isolated devices and method for forming the same
#118Semiconductor device with localized carrier lifetime reduction and fabrication method thereof
#119Method for manufacturing memory device
#120Method and device to improve shallow trench isolation
#121Trench separation diffusion for high voltage device
#122Method for manufacturing a device isolation structure
#123Vertical structure having an etch stop over portion of the source
#124Mechanisms for forming FinFETs with different fin heights
#125Stress memorization technique for strain coupling enhancement in bulk finFET device
#126Semiconductor device with front and rear surface electrodes on a substrate having element and circumferential regions, an insulating gate type switching element in the element region being configured to switch between the front and rear surface electrodes
#127Insulated gate semiconductor device and method for manufacturing the insulated gate semiconductor device
#128Bipolar junction transistors with a buried dielectric region in the active device region
#129Isolated and bulk semiconductor devices formed on a same bulk substrate
#130Mechanism for FinFET well doping
#131Forming punch-through stopper regions in finFET devices
#132Semiconductor device and manufacturing method
#133Method of forming superjunction high voltage devices using wafer bonding
#134Manufacturing method of semiconductor device
#135Deep trench isolation
#136Implant isolated devices and method for forming the same
#137Technique of reducing shallow trench isolation loss during fin formation in finFETs
#138Rotated STI diode on FinFET technology
#139Compensation devices
#140Isolation structure of fin field effect transistor
#141Monolithic DMOS transistor in junction isolated process
#142Semiconductor device and method for manufacturing semiconductor device having a step provided in a lateral surface of a trench formed in a surface of a semiconductor substrate
#143SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
#144Isolation structure for semiconductor device
#145Methods for fabricating integrated circuits with isolation regions having uniform step heights
#146Device isolation structure and manufacture method
#147Silicon-on-insulator integrated circuit devices with body contact structures and methods for fabricating the same
#148Mechanism of forming a trench structure
#149Isolation for semiconductor devices
#150Mechanisms for forming FinFETs with different fin heights
#151Saucer-shaped isolation structures for semiconductor devices
#152Isolation structures for semiconductor devices including trenches containing conductive material
#153Method of preparing self-aligned isolation regions between sensor elements
#154Low leakage dual STI integrated circuit including FDSOI transistors
#155Uniform shallow trench isolation regions and the method of forming the same
#156Methods of forming low noise semiconductor devices
#157Isolation structure for IC with EPI regions sharing the same tank
#158Semiconductor device with an interconnect and a method for manufacturing thereof
#159Semiconductor device with trench isolation
#160METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
#161Varied STI liners for isolation structures in image sensing devices
#162Methods of manufacturing high electron mobility transistors
#163Power semiconductor device and method of fabricating the same and cutoff ring
#164Formation of a high aspect ratio trench in a semiconductor substrate and a bipolar semiconductor device having a high aspect ratio trench isolation region
#165FinFET structures having silicon germanium and silicon fins
#166MOSFET termination trench
#167Mechanisms for forming FinFETs with different fin heights
#168Integrated circuits with a buried N layer and methods for producing such integrated circuits
#169Mechanism for FinFET well doping
#170Method for fabricating shallow trench isolation structure
#171Multiple-time programming memory cells and methods for forming the same
#172Integrated circuit using deep trench through silicon (DTS)
#173Semiconductor device and manufacturing method of the same
#174Method of stressing a semiconductor layer
#175Method of forming stressed semiconductor layer
#176Semiconductor device with trench isolation
#177Method of making backside illuminated image sensors
#178Formation of a high aspect ratio trench in a semiconductor substrate and a bipolar semiconductor device having a high aspect ratio trench isolation region
#179Mechanism of forming a trench structure
#180Mechanism of forming a trench structure
#181Non-volatile memory device and method of manufacturing the same
#182Method of controlling threshold voltage and method of fabricating semiconductor device
#183Isolation structures for semiconductor devices
#184SOI structure for signal isolation and linearity
#185Trench power MOSFET structure fabrication method
#186Compensation devices
#187Multiple-time programming memory cells and methods for forming the same
#188Contact isolation scheme for thin buried oxide substrate devices
#189Semiconductor device having fin structure and method of manufacturing the same
#190Deep trench isolation
#191Method and structure for nitrogen-doped shallow-trench isolation dielectric
#192Varied STI liners for isolation structures in image sensing devices
#193Self-aligned implants to reduce cross-talk of imaging sensors
#194Method of manufacturing semiconductor device
#195Trench isolation implantation
#196Butted SOI junction isolation structures and devices and method of fabrication
#197Method for forming an insulating trench in a semiconductor substrate and structure, especially CMOS image sensor, obtained by said method
#198Semiconductor device and method of manufacture
#199Method of making a shallow trench isolation (STI) structures
#200Implant isolated devices and method for forming the same
#201Implant isolated devices and method for forming the same
#202Method of forming isolation structure
#203Semiconductor device and method of manufacturing same
#204Isolation for semiconductor devices
#205Isolated and bulk semiconductor devices formed on a same bulk substrate
#206Semiconductor device formation
#207Semiconductor device having fin structure and method of manufacturing the same
#208Method for manufacturing reverse-blocking semiconductor element
#209Method for Manufacturing Semiconductor Device
#210Multiple-time programming memory cells and methods for forming the same
#211MOSFET termination trench
#212SOI structure and method for utilizing trenches for signal isolation and linearity
#213Semiconductor process
#214Method for forming a deep trench in a microelectronic component substrate
#215Localized carrier lifetime reduction
#216Uniform shallow trench isolation regions and the method of forming the same
#217METHOD FOR MANUFACTURING INSULATED-GATE TRANSISTORS
#218Process for producing at least one deep trench isolation
#219Semiconductor devices and methods of manufacturing the same
#220INTEGRATED CIRCUIT COMPRISING AN ISOLATING TRENCH AND CORRESPONDING METHOD
#221High Voltage Isolation Trench, Its Fabrication Method and MOS Device
#222Non-volatile memory device and method of manufacturing the same
#223Method of manufacturing a reverse blocking insulated gate bipolar transistor
#224Semiconductor device and manufacturing method
#225Dopant Implantation Hardmask for Forming Doped Isolation Regions in Image Sensors
#226METHOD FOR PREPARING A SHALLOW TRENCH ISOLATION STRUCTURE WITH THE STRESS OF ITS ISOLATION OXIDE BEING TUNED BY ION IMPLANTATION
#227Method for forming the semiconductor cell
#228Optimized channel implant for a semiconductor device and method of forming the same
#229METHOD FOR FORMING A SELF-ALIGNED ISOLATION STRUCTURE UTILIZING SIDEWALL SPACERS AS AN ETCH MASK AND REMAINING AS A PORTION OF THE ISOLATION STRUCTURE
#230SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#231Doped oxide for shallow trench isolation (STI)
#232VERTICAL PARASITIC PNP DEVICE IN A SILICON-GERMANIUM HBT PROCESS AND MANUFACTURING METHOD OF THE SAME
#233SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#234Nitride etch for improved spacer uniformity
#235Butted SOI junction isolation structures and devices and method of fabrication
#236Semiconductor device and method for fabricating the same
#237Methods Of Manufacturing High Electron Mobility Transistors
#238Self-aligned implants to reduce cross-talk of imaging sensors
#239DEVICE AND METHOD FOR UNIFORM STI RECESS
#240Semiconductor device with a depletion channel and method of manufacturing the same
#241METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WHICH A PLURALITY OF TYPES OF TRANSISTORS ARE MOUNTED
#242Structure and method to control bottom corner threshold in an SOI device
#243Shallow trench isolation extension
#244TRENCH ISOLATION AND METHOD OF FABRICATING TRENCH ISOLATION
#245Silicon-on-insulator devices with buried depletion shield layer
#246Process of fabricating semiconductor device with low capacitance for high-frequency circuit protection
#247Semiconductor device and method for manufacturing the same
#248Manufacturing approach for collector and a buried layer of bipolar transistor
#249Production of isolation trenches with different sidewall dopings
#250Low noise semiconductor devices
#251Semiconductor device and method of manufacturing a semiconductor device
#252Leakage control in field effect transistors based on an implantation species introduced locally at the STI edge
#253Narrow channel width effect modification in a shallow trench isolation device
#254Method for forming a self-aligned isolation structure utilizing sidewall spacers as an etch mask and remaining as a portion of the isolation structure
#255Semiconductor structure and method of manufacture
#256Isolation structure for backside illuminated image sensor
#257SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#258Trench isolation implantation
#259Method of implantation
#260Method for fabricating semiconductor device
#261Dark currents and reducing defects in image sensors and photovoltaic junctions
#262Semiconductor integrated circuit device having improved punch-through resistance and production method thereof, semiconductor integrated circuit device including a low-voltage transistor and a high-voltage transistor
#263Boron film interface engineering
#264STI stress modulation with additional implantation and natural pad sin mask
#265SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#266Application of different isolation schemes for logic and embedded memory
#267Isolation structures for integrated circuits
#268Semiconductor Device and Method for Fabricating the Same
#269Method of forming a channel termination region using a trench and a channel stopper ring
#270Semiconductor device
#271Method of filling a trench and method of forming an isolating layer structure using the same
#272Strain modulation in active areas by controlled incorporation of nitrogen at si-SiO2 interface
#273DEEP GUARD REGIONS FOR REDUCING LATCH-UP IN ELECTRONICS DEVICES
#274Semiconductor structure and method of manufacture
#275Method of fabricating semiconductor device having vertical channel transistor
#276Semiconductor structure and method of manufacture
#277FORMING CHANNEL STOP FOR DEEP TRENCH ISOLATION PRIOR TO DEEP TRENCH ETCH
#278Semiconductor device and method for manufacturing semiconductor device
#279Method of forming STI regions in electronic devices
#280Trench isolation and method of fabricating trench isolation
#281Method of implanting a non-dopant atom into a semiconductor device
#282Deep trench isolation structures in integrated semiconductor devices
#283INTEGRATED DEVICE
#284Ion implantation method and semiconductor device manufacturing method
#285METHOD FOR MANUFACTURING SHALLOW TRENCH ISOLATION
#286Method of forming a gate oxide layer
#287METHOD FOR PREPARING A SHALLOW TRENCH ISOLATION
#288Isolation structures for integrated circuits
#289Isolation structures for integrated circuits
#290Isolation structures for integrated circuits
#291Method for preparing a shallow trench isolation
#292Method of Fabricating Semiconductor Device
#293Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures
#294Method of manufacturing semiconductor device on which a plurality of types of transistors are mounted
#295Isolation structure for MOS transistor and method for forming the same
#296Structure and method to form improved isolation in a semiconductor device
#297Semiconductor device with isolation formed between digital circuit and analog circuit
#298Method of forming device isolation film of semiconductor device
#299Method of forming isolation layer of semiconductor device
#300METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE